David S. Miller | 64d329e | 2007-10-27 00:17:01 -0700 | [diff] [blame] | 1 | /* linux/arch/sparc/kernel/time.c |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * |
David S. Miller | 64d329e | 2007-10-27 00:17:01 -0700 | [diff] [blame] | 3 | * Copyright (C) 1995 David S. Miller (davem@davemloft.net) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) |
| 5 | * |
| 6 | * Chris Davis (cdavis@cois.on.ca) 03/27/1998 |
| 7 | * Added support for the intersil on the sun4/4200 |
| 8 | * |
| 9 | * Gleb Raiko (rajko@mech.math.msu.su) 08/18/1998 |
| 10 | * Support for MicroSPARC-IIep, PCI CPU. |
| 11 | * |
| 12 | * This file handles the Sparc specific time handling details. |
| 13 | * |
| 14 | * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 |
| 15 | * "A Kernel Model for Precision Timekeeping" by Dave Mills |
| 16 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | #include <linux/errno.h> |
| 18 | #include <linux/module.h> |
| 19 | #include <linux/sched.h> |
| 20 | #include <linux/kernel.h> |
| 21 | #include <linux/param.h> |
| 22 | #include <linux/string.h> |
| 23 | #include <linux/mm.h> |
| 24 | #include <linux/interrupt.h> |
| 25 | #include <linux/time.h> |
David S. Miller | c4cbe6f | 2008-09-03 15:52:38 -0700 | [diff] [blame] | 26 | #include <linux/rtc.h> |
| 27 | #include <linux/rtc/m48t59.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | #include <linux/timex.h> |
Tkhai Kirill | 62f0828 | 2012-04-04 21:49:26 +0200 | [diff] [blame] | 29 | #include <linux/clocksource.h> |
| 30 | #include <linux/clockchips.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | #include <linux/init.h> |
| 32 | #include <linux/pci.h> |
| 33 | #include <linux/ioport.h> |
| 34 | #include <linux/profile.h> |
David S. Miller | 454eeb2 | 2008-08-27 04:05:35 -0700 | [diff] [blame] | 35 | #include <linux/of.h> |
Stephen Rothwell | 764f257 | 2008-08-07 15:33:36 -0700 | [diff] [blame] | 36 | #include <linux/of_device.h> |
David S. Miller | c4cbe6f | 2008-09-03 15:52:38 -0700 | [diff] [blame] | 37 | #include <linux/platform_device.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | |
| 39 | #include <asm/oplib.h> |
John Stultz | 0299b13 | 2010-01-15 01:34:28 -0800 | [diff] [blame] | 40 | #include <asm/timex.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | #include <asm/timer.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 42 | #include <asm/irq.h> |
| 43 | #include <asm/io.h> |
| 44 | #include <asm/idprom.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | #include <asm/page.h> |
| 46 | #include <asm/pcic.h> |
Al Viro | 0d84438 | 2006-10-08 14:30:44 +0100 | [diff] [blame] | 47 | #include <asm/irq_regs.h> |
Tkhai Kirill | 62f0828 | 2012-04-04 21:49:26 +0200 | [diff] [blame] | 48 | #include <asm/setup.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 | |
Al Viro | 32231a6 | 2007-07-21 19:18:57 -0700 | [diff] [blame] | 50 | #include "irq.h" |
| 51 | |
Tkhai Kirill | 62f0828 | 2012-04-04 21:49:26 +0200 | [diff] [blame] | 52 | static __cacheline_aligned_in_smp DEFINE_SEQLOCK(timer_cs_lock); |
| 53 | static __volatile__ u64 timer_cs_internal_counter = 0; |
| 54 | static char timer_cs_enabled = 0; |
| 55 | |
| 56 | static struct clock_event_device timer_ce; |
| 57 | static char timer_ce_enabled = 0; |
| 58 | |
| 59 | #ifdef CONFIG_SMP |
| 60 | DEFINE_PER_CPU(struct clock_event_device, sparc32_clockevent); |
| 61 | #endif |
| 62 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | DEFINE_SPINLOCK(rtc_lock); |
Sam Ravnborg | 6943f3d | 2009-01-08 16:58:05 -0800 | [diff] [blame] | 64 | EXPORT_SYMBOL(rtc_lock); |
| 65 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | static int set_rtc_mmss(unsigned long); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 68 | unsigned long profile_pc(struct pt_regs *regs) |
| 69 | { |
| 70 | extern char __copy_user_begin[], __copy_user_end[]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 71 | extern char __bzero_begin[], __bzero_end[]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 72 | |
| 73 | unsigned long pc = regs->pc; |
| 74 | |
| 75 | if (in_lock_functions(pc) || |
| 76 | (pc >= (unsigned long) __copy_user_begin && |
| 77 | pc < (unsigned long) __copy_user_end) || |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 78 | (pc >= (unsigned long) __bzero_begin && |
David S. Miller | 8a8b836 | 2006-12-17 16:18:47 -0800 | [diff] [blame] | 79 | pc < (unsigned long) __bzero_end)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 80 | pc = regs->u_regs[UREG_RETPC]; |
| 81 | return pc; |
| 82 | } |
| 83 | |
Martin Habets | 9550e59 | 2006-10-17 19:21:48 -0700 | [diff] [blame] | 84 | EXPORT_SYMBOL(profile_pc); |
| 85 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | __volatile__ unsigned int *master_l10_counter; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 87 | |
John Stultz | f5c9c9b | 2010-03-03 19:57:27 -0800 | [diff] [blame] | 88 | int update_persistent_clock(struct timespec now) |
| 89 | { |
| 90 | return set_rtc_mmss(now.tv_sec); |
| 91 | } |
| 92 | |
Tkhai Kirill | 62f0828 | 2012-04-04 21:49:26 +0200 | [diff] [blame] | 93 | irqreturn_t notrace timer_interrupt(int dummy, void *dev_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 94 | { |
Tkhai Kirill | 62f0828 | 2012-04-04 21:49:26 +0200 | [diff] [blame] | 95 | if (timer_cs_enabled) { |
| 96 | write_seqlock(&timer_cs_lock); |
| 97 | timer_cs_internal_counter++; |
Sam Ravnborg | 08c9388 | 2012-05-14 17:30:35 +0200 | [diff] [blame] | 98 | sparc_config.clear_clock_irq(); |
Tkhai Kirill | 62f0828 | 2012-04-04 21:49:26 +0200 | [diff] [blame] | 99 | write_sequnlock(&timer_cs_lock); |
| 100 | } else { |
Sam Ravnborg | 08c9388 | 2012-05-14 17:30:35 +0200 | [diff] [blame] | 101 | sparc_config.clear_clock_irq(); |
Tkhai Kirill | 62f0828 | 2012-04-04 21:49:26 +0200 | [diff] [blame] | 102 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 103 | |
Tkhai Kirill | 62f0828 | 2012-04-04 21:49:26 +0200 | [diff] [blame] | 104 | if (timer_ce_enabled) |
| 105 | timer_ce.event_handler(&timer_ce); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 106 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 107 | return IRQ_HANDLED; |
| 108 | } |
| 109 | |
Tkhai Kirill | 62f0828 | 2012-04-04 21:49:26 +0200 | [diff] [blame] | 110 | static void timer_ce_set_mode(enum clock_event_mode mode, |
| 111 | struct clock_event_device *evt) |
| 112 | { |
| 113 | switch (mode) { |
| 114 | case CLOCK_EVT_MODE_PERIODIC: |
| 115 | case CLOCK_EVT_MODE_RESUME: |
| 116 | timer_ce_enabled = 1; |
| 117 | break; |
| 118 | case CLOCK_EVT_MODE_SHUTDOWN: |
| 119 | timer_ce_enabled = 0; |
| 120 | break; |
| 121 | default: |
| 122 | break; |
| 123 | } |
| 124 | smp_mb(); |
| 125 | } |
| 126 | |
| 127 | static __init void setup_timer_ce(void) |
| 128 | { |
| 129 | struct clock_event_device *ce = &timer_ce; |
| 130 | |
| 131 | BUG_ON(smp_processor_id() != boot_cpu_id); |
| 132 | |
| 133 | ce->name = "timer_ce"; |
| 134 | ce->rating = 100; |
| 135 | ce->features = CLOCK_EVT_FEAT_PERIODIC; |
| 136 | ce->set_mode = timer_ce_set_mode; |
| 137 | ce->cpumask = cpu_possible_mask; |
| 138 | ce->shift = 32; |
| 139 | ce->mult = div_sc(sparc_config.clock_rate, NSEC_PER_SEC, |
| 140 | ce->shift); |
| 141 | clockevents_register_device(ce); |
| 142 | } |
| 143 | |
| 144 | static unsigned int sbus_cycles_offset(void) |
| 145 | { |
| 146 | unsigned int val, offset; |
| 147 | |
| 148 | val = *master_l10_counter; |
| 149 | offset = (val >> TIMER_VALUE_SHIFT) & TIMER_VALUE_MASK; |
| 150 | |
| 151 | /* Limit hit? */ |
| 152 | if (val & TIMER_LIMIT_BIT) |
| 153 | offset += sparc_config.cs_period; |
| 154 | |
| 155 | return offset; |
| 156 | } |
| 157 | |
| 158 | static cycle_t timer_cs_read(struct clocksource *cs) |
| 159 | { |
| 160 | unsigned int seq, offset; |
| 161 | u64 cycles; |
| 162 | |
| 163 | do { |
| 164 | seq = read_seqbegin(&timer_cs_lock); |
| 165 | |
| 166 | cycles = timer_cs_internal_counter; |
| 167 | offset = sparc_config.get_cycles_offset(); |
| 168 | } while (read_seqretry(&timer_cs_lock, seq)); |
| 169 | |
| 170 | /* Count absolute cycles */ |
| 171 | cycles *= sparc_config.cs_period; |
| 172 | cycles += offset; |
| 173 | |
| 174 | return cycles; |
| 175 | } |
| 176 | |
| 177 | static struct clocksource timer_cs = { |
| 178 | .name = "timer_cs", |
| 179 | .rating = 100, |
| 180 | .read = timer_cs_read, |
| 181 | .mask = CLOCKSOURCE_MASK(64), |
| 182 | .shift = 2, |
| 183 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
| 184 | }; |
| 185 | |
| 186 | static __init int setup_timer_cs(void) |
| 187 | { |
| 188 | timer_cs_enabled = 1; |
| 189 | timer_cs.mult = clocksource_hz2mult(sparc_config.clock_rate, |
| 190 | timer_cs.shift); |
| 191 | |
| 192 | return clocksource_register(&timer_cs); |
| 193 | } |
| 194 | |
| 195 | #ifdef CONFIG_SMP |
| 196 | static void percpu_ce_setup(enum clock_event_mode mode, |
| 197 | struct clock_event_device *evt) |
| 198 | { |
| 199 | int cpu = __first_cpu(evt->cpumask); |
| 200 | |
| 201 | switch (mode) { |
| 202 | case CLOCK_EVT_MODE_PERIODIC: |
Sam Ravnborg | 08c9388 | 2012-05-14 17:30:35 +0200 | [diff] [blame] | 203 | sparc_config.load_profile_irq(cpu, |
| 204 | SBUS_CLOCK_RATE / HZ); |
Tkhai Kirill | 62f0828 | 2012-04-04 21:49:26 +0200 | [diff] [blame] | 205 | break; |
| 206 | case CLOCK_EVT_MODE_ONESHOT: |
| 207 | case CLOCK_EVT_MODE_SHUTDOWN: |
| 208 | case CLOCK_EVT_MODE_UNUSED: |
Sam Ravnborg | 08c9388 | 2012-05-14 17:30:35 +0200 | [diff] [blame] | 209 | sparc_config.load_profile_irq(cpu, 0); |
Tkhai Kirill | 62f0828 | 2012-04-04 21:49:26 +0200 | [diff] [blame] | 210 | break; |
| 211 | default: |
| 212 | break; |
| 213 | } |
| 214 | } |
| 215 | |
| 216 | static int percpu_ce_set_next_event(unsigned long delta, |
| 217 | struct clock_event_device *evt) |
| 218 | { |
| 219 | int cpu = __first_cpu(evt->cpumask); |
| 220 | unsigned int next = (unsigned int)delta; |
| 221 | |
Sam Ravnborg | 08c9388 | 2012-05-14 17:30:35 +0200 | [diff] [blame] | 222 | sparc_config.load_profile_irq(cpu, next); |
Tkhai Kirill | 62f0828 | 2012-04-04 21:49:26 +0200 | [diff] [blame] | 223 | return 0; |
| 224 | } |
| 225 | |
| 226 | void register_percpu_ce(int cpu) |
| 227 | { |
| 228 | struct clock_event_device *ce = &per_cpu(sparc32_clockevent, cpu); |
| 229 | unsigned int features = CLOCK_EVT_FEAT_PERIODIC; |
| 230 | |
| 231 | if (sparc_config.features & FEAT_L14_ONESHOT) |
| 232 | features |= CLOCK_EVT_FEAT_ONESHOT; |
| 233 | |
| 234 | ce->name = "percpu_ce"; |
| 235 | ce->rating = 200; |
| 236 | ce->features = features; |
| 237 | ce->set_mode = percpu_ce_setup; |
| 238 | ce->set_next_event = percpu_ce_set_next_event; |
| 239 | ce->cpumask = cpumask_of(cpu); |
| 240 | ce->shift = 32; |
| 241 | ce->mult = div_sc(sparc_config.clock_rate, NSEC_PER_SEC, |
| 242 | ce->shift); |
| 243 | ce->max_delta_ns = clockevent_delta2ns(sparc_config.clock_rate, ce); |
| 244 | ce->min_delta_ns = clockevent_delta2ns(100, ce); |
| 245 | |
| 246 | clockevents_register_device(ce); |
| 247 | } |
| 248 | #endif |
| 249 | |
David S. Miller | c4cbe6f | 2008-09-03 15:52:38 -0700 | [diff] [blame] | 250 | static unsigned char mostek_read_byte(struct device *dev, u32 ofs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 251 | { |
David S. Miller | c4cbe6f | 2008-09-03 15:52:38 -0700 | [diff] [blame] | 252 | struct platform_device *pdev = to_platform_device(dev); |
| 253 | struct m48t59_plat_data *pdata = pdev->dev.platform_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 254 | |
Krzysztof Helt | 12a9ee3 | 2008-10-29 15:35:24 -0700 | [diff] [blame] | 255 | return readb(pdata->ioaddr + ofs); |
David S. Miller | c4cbe6f | 2008-09-03 15:52:38 -0700 | [diff] [blame] | 256 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 257 | |
David S. Miller | c4cbe6f | 2008-09-03 15:52:38 -0700 | [diff] [blame] | 258 | static void mostek_write_byte(struct device *dev, u32 ofs, u8 val) |
| 259 | { |
| 260 | struct platform_device *pdev = to_platform_device(dev); |
| 261 | struct m48t59_plat_data *pdata = pdev->dev.platform_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 262 | |
Krzysztof Helt | 12a9ee3 | 2008-10-29 15:35:24 -0700 | [diff] [blame] | 263 | writeb(val, pdata->ioaddr + ofs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 264 | } |
| 265 | |
David S. Miller | c4cbe6f | 2008-09-03 15:52:38 -0700 | [diff] [blame] | 266 | static struct m48t59_plat_data m48t59_data = { |
| 267 | .read_byte = mostek_read_byte, |
| 268 | .write_byte = mostek_write_byte, |
| 269 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 270 | |
David S. Miller | c4cbe6f | 2008-09-03 15:52:38 -0700 | [diff] [blame] | 271 | /* resource is set at runtime */ |
| 272 | static struct platform_device m48t59_rtc = { |
| 273 | .name = "rtc-m48t59", |
| 274 | .id = 0, |
| 275 | .num_resources = 1, |
| 276 | .dev = { |
| 277 | .platform_data = &m48t59_data, |
| 278 | }, |
| 279 | }; |
Bob Breuer | 96ba989 | 2006-07-27 22:08:01 -0700 | [diff] [blame] | 280 | |
Greg Kroah-Hartman | 7c9503b | 2012-12-21 14:03:26 -0800 | [diff] [blame] | 281 | static int clock_probe(struct platform_device *op) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 282 | { |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 283 | struct device_node *dp = op->dev.of_node; |
Stephen Rothwell | 8271f04 | 2007-03-29 00:47:23 -0700 | [diff] [blame] | 284 | const char *model = of_get_property(dp, "model", NULL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 285 | |
David S. Miller | ee5caf0 | 2006-06-29 14:36:52 -0700 | [diff] [blame] | 286 | if (!model) |
| 287 | return -ENODEV; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 288 | |
Kjetil Oftedal | 1c833bc | 2011-03-24 16:34:52 -0700 | [diff] [blame] | 289 | /* Only the primary RTC has an address property */ |
| 290 | if (!of_find_property(dp, "address", NULL)) |
| 291 | return -ENODEV; |
| 292 | |
David S. Miller | c4cbe6f | 2008-09-03 15:52:38 -0700 | [diff] [blame] | 293 | m48t59_rtc.resource = &op->resource[0]; |
David S. Miller | ee5caf0 | 2006-06-29 14:36:52 -0700 | [diff] [blame] | 294 | if (!strcmp(model, "mk48t02")) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 295 | /* Map the clock register io area read-only */ |
David S. Miller | c4cbe6f | 2008-09-03 15:52:38 -0700 | [diff] [blame] | 296 | m48t59_data.ioaddr = of_ioremap(&op->resource[0], 0, |
| 297 | 2048, "rtc-m48t59"); |
| 298 | m48t59_data.type = M48T59RTC_TYPE_M48T02; |
David S. Miller | ee5caf0 | 2006-06-29 14:36:52 -0700 | [diff] [blame] | 299 | } else if (!strcmp(model, "mk48t08")) { |
David S. Miller | c4cbe6f | 2008-09-03 15:52:38 -0700 | [diff] [blame] | 300 | m48t59_data.ioaddr = of_ioremap(&op->resource[0], 0, |
| 301 | 8192, "rtc-m48t59"); |
| 302 | m48t59_data.type = M48T59RTC_TYPE_M48T08; |
David S. Miller | ee5caf0 | 2006-06-29 14:36:52 -0700 | [diff] [blame] | 303 | } else |
| 304 | return -ENODEV; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 305 | |
David S. Miller | c4cbe6f | 2008-09-03 15:52:38 -0700 | [diff] [blame] | 306 | if (platform_device_register(&m48t59_rtc) < 0) |
| 307 | printk(KERN_ERR "Registering RTC device failed\n"); |
Bob Breuer | 96ba989 | 2006-07-27 22:08:01 -0700 | [diff] [blame] | 308 | |
David S. Miller | ee5caf0 | 2006-06-29 14:36:52 -0700 | [diff] [blame] | 309 | return 0; |
| 310 | } |
| 311 | |
Sam Ravnborg | 505d914 | 2011-04-21 15:37:20 -0700 | [diff] [blame] | 312 | static struct of_device_id clock_match[] = { |
David S. Miller | ee5caf0 | 2006-06-29 14:36:52 -0700 | [diff] [blame] | 313 | { |
| 314 | .name = "eeprom", |
| 315 | }, |
| 316 | {}, |
| 317 | }; |
| 318 | |
Grant Likely | 4ebb24f | 2011-02-22 20:01:33 -0700 | [diff] [blame] | 319 | static struct platform_driver clock_driver = { |
David S. Miller | ee5caf0 | 2006-06-29 14:36:52 -0700 | [diff] [blame] | 320 | .probe = clock_probe, |
Grant Likely | 4018294 | 2010-04-13 16:13:02 -0700 | [diff] [blame] | 321 | .driver = { |
| 322 | .name = "rtc", |
| 323 | .owner = THIS_MODULE, |
| 324 | .of_match_table = clock_match, |
Stephen Rothwell | a2cd155 | 2007-10-10 23:27:34 -0700 | [diff] [blame] | 325 | }, |
David S. Miller | ee5caf0 | 2006-06-29 14:36:52 -0700 | [diff] [blame] | 326 | }; |
| 327 | |
| 328 | |
| 329 | /* Probe for the mostek real time clock chip. */ |
Bob Breuer | 96ba989 | 2006-07-27 22:08:01 -0700 | [diff] [blame] | 330 | static int __init clock_init(void) |
David S. Miller | ee5caf0 | 2006-06-29 14:36:52 -0700 | [diff] [blame] | 331 | { |
Grant Likely | 4ebb24f | 2011-02-22 20:01:33 -0700 | [diff] [blame] | 332 | return platform_driver_register(&clock_driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 333 | } |
Bob Breuer | 96ba989 | 2006-07-27 22:08:01 -0700 | [diff] [blame] | 334 | /* Must be after subsys_initcall() so that busses are probed. Must |
| 335 | * be before device_initcall() because things like the RTC driver |
| 336 | * need to see the clock registers. |
| 337 | */ |
| 338 | fs_initcall(clock_init); |
Bob Breuer | 96ba989 | 2006-07-27 22:08:01 -0700 | [diff] [blame] | 339 | |
Tkhai Kirill | 62f0828 | 2012-04-04 21:49:26 +0200 | [diff] [blame] | 340 | static void __init sparc32_late_time_init(void) |
John Stultz | 0299b13 | 2010-01-15 01:34:28 -0800 | [diff] [blame] | 341 | { |
Tkhai Kirill | 62f0828 | 2012-04-04 21:49:26 +0200 | [diff] [blame] | 342 | if (sparc_config.features & FEAT_L10_CLOCKEVENT) |
| 343 | setup_timer_ce(); |
| 344 | if (sparc_config.features & FEAT_L10_CLOCKSOURCE) |
| 345 | setup_timer_cs(); |
| 346 | #ifdef CONFIG_SMP |
| 347 | register_percpu_ce(smp_processor_id()); |
| 348 | #endif |
John Stultz | 0299b13 | 2010-01-15 01:34:28 -0800 | [diff] [blame] | 349 | } |
| 350 | |
Adrian Bunk | c61c65c | 2008-06-05 11:40:58 -0700 | [diff] [blame] | 351 | static void __init sbus_time_init(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 352 | { |
Tkhai Kirill | 62f0828 | 2012-04-04 21:49:26 +0200 | [diff] [blame] | 353 | sparc_config.get_cycles_offset = sbus_cycles_offset; |
| 354 | sparc_config.init_timers(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 355 | } |
| 356 | |
| 357 | void __init time_init(void) |
| 358 | { |
Tkhai Kirill | 62f0828 | 2012-04-04 21:49:26 +0200 | [diff] [blame] | 359 | sparc_config.features = 0; |
| 360 | late_time_init = sparc32_late_time_init; |
| 361 | |
Sam Ravnborg | 06010fb | 2011-04-17 13:49:55 +0200 | [diff] [blame] | 362 | if (pcic_present()) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 363 | pci_time_init(); |
Sam Ravnborg | 06010fb | 2011-04-17 13:49:55 +0200 | [diff] [blame] | 364 | else |
| 365 | sbus_time_init(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 366 | } |
| 367 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 368 | |
David S. Miller | c4cbe6f | 2008-09-03 15:52:38 -0700 | [diff] [blame] | 369 | static int set_rtc_mmss(unsigned long secs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 370 | { |
David S. Miller | c4cbe6f | 2008-09-03 15:52:38 -0700 | [diff] [blame] | 371 | struct rtc_device *rtc = rtc_class_open("rtc0"); |
David S. Miller | ab138c0 | 2008-09-10 13:36:13 -0700 | [diff] [blame] | 372 | int err = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 373 | |
David S. Miller | ab138c0 | 2008-09-10 13:36:13 -0700 | [diff] [blame] | 374 | if (rtc) { |
| 375 | err = rtc_set_mmss(rtc, secs); |
| 376 | rtc_class_close(rtc); |
| 377 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 378 | |
David S. Miller | ab138c0 | 2008-09-10 13:36:13 -0700 | [diff] [blame] | 379 | return err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 380 | } |