blob: 39438a7733254fa4be3fc02a9c6c12a4e1fbb718 [file] [log] [blame]
/*
* Copyright (C) 2014 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "imx6sx.dtsi"
/ {
model = "Freescale i.MX6 SoloX Sabre Auto Board";
compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx";
backlight2 {
compatible = "pwm-backlight";
pwms = <&pwm4 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
fb-names = "mxs-lcdif1";
};
clocks {
codec_osc: anaclk2 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24576000>;
};
};
max7310_reset: max7310-reset {
compatible = "gpio-reset";
reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
reset-delay-us = <1>;
#reset-cells = <0>;
};
memory {
reg = <0x80000000 0x80000000>;
};
pxp_v4l2_out {
compatible = "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2";
status = "okay";
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
reg_audio: cs42888_supply {
compatible = "regulator-fixed";
regulator-name = "cs42888_supply";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
si4763_vio1: vio1_tnr {
compatible = "regulator-fixed";
regulator-name = "vio1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
si4763_vio2: vio2_tnr {
compatible = "regulator-fixed";
regulator-name = "vio2";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
si4763_vd: f3v3_tnr {
compatible = "regulator-fixed";
regulator-name = "vd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
si4763_va: f5v_tnr {
compatible = "regulator-fixed";
regulator-name = "va";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vcc_sd3: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_vcc_sd3>;
regulator-name = "VCC_SD3";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_usb_otg1_vbus: usb_otg1_vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_otg1_vbus>;
regulator-name = "usb_otg1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio1 9 0>;
enable-active-high;
};
reg_usb_otg2_vbus: usb_otg2_vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_otg2_vbus>;
regulator-name = "usb_otg2_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio1 12 0>;
enable-active-high;
};
reg_can_wake: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "can-wake";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&max7310_b 7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_can_en: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "can-en";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&max7310_b 5 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&reg_can_wake>;
};
reg_can_stby: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "can-stby";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&max7310_b 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&reg_can_en>;
};
reg_vref_3v3: regulator@4 {
compatible = "regulator-fixed";
regulator-name = "vref-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
sound-cs42888 {
compatible = "fsl,imx6-sabreauto-cs42888",
"fsl,imx-audio-cs42888";
model = "imx-cs42888";
esai-controller = <&esai>;
asrc-controller = <&asrc>;
audio-codec = <&codec>;
};
sound-fm {
compatible = "fsl,imx-audio-si476x",
"fsl,imx-tuner-si476x";
model = "imx-radio-si4763";
ssi-controller = <&ssi2>;
fm-controller = <&si476x_codec>;
mux-int-port = <2>;
mux-ext-port = <5>;
};
sound-spdif {
compatible = "fsl,imx-audio-spdif";
model = "imx-spdif";
spdif-controller = <&spdif>;
spdif-in;
};
};
&adc1 {
vref-supply = <&reg_vref_3v3>;
status = "okay";
};
&adc2 {
vref-supply = <&reg_vref_3v3>;
status = "okay";
};
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux_3>;
status = "okay";
};
&clks {
assigned-clocks = <&clks IMX6SX_PLL4_BYPASS_SRC>,
<&clks IMX6SX_PLL4_BYPASS>,
<&clks IMX6SX_CLK_PLL4_POST_DIV>;
assigned-clock-parents = <&clks IMX6SX_CLK_LVDS2_IN>,
<&clks IMX6SX_PLL4_BYPASS_SRC>;
assigned-clock-rates = <0>, <0>, <24576000>;
};
&esai {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esai_2>;
assigned-clocks = <&clks IMX6SX_CLK_ESAI_SEL>,
<&clks IMX6SX_CLK_ESAI_EXTAL>;
assigned-clock-parents = <&clks IMX6SX_CLK_PLL4_AUDIO_DIV>;
assigned-clock-rates = <0>, <24576000>;
status = "okay";
};
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1_1>;
phy-mode = "rgmii";
phy-handle = <&ethphy1>;
pinctrl-assert-gpios = <&max7322 0 GPIO_ACTIVE_HIGH>;
fsl,magic-packet;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
ethphy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
};
&fec2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet2_1>;
phy-mode = "rgmii";
phy-handle = <&ethphy0>;
fsl,magic-packet;
status = "okay";
};
&flexcan1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
xceiver-supply = <&reg_can_stby>;
status = "okay";
};
&flexcan2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan2>;
xceiver-supply = <&reg_can_stby>;
status = "okay";
};
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand_1>;
status = "okay";
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c2_1>;
pinctrl-1 = <&pinctrl_i2c2_1_gpio>;
scl-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
status = "okay";
codec: cs42888@048 {
compatible = "cirrus,cs42888";
reg = <0x048>;
clocks = <&codec_osc 0>;
clock-names = "mclk";
VA-supply = <&reg_audio>;
VD-supply = <&reg_audio>;
VLS-supply = <&reg_audio>;
VLC-supply = <&reg_audio>;
};
egalax_ts@04 {
compatible = "eeti,egalax_ts";
reg = <0x04>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_egalax_int>;
interrupt-parent = <&gpio6>;
interrupts = <22 2>;
wakeup-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>;
};
si4763: si4763@63 {
compatible = "si4761";
reg = <0x63>;
va-supply = <&si4763_va>;
vd-supply = <&si4763_vd>;
vio1-supply = <&si4763_vio1>;
vio2-supply = <&si4763_vio2>;
revision-a10; /* set to default A10 compatible command set */
si476x_codec: si476x-codec {
compatible = "si476x-codec";
};
};
max7322: gpio@68 {
compatible = "maxim,max7322";
reg = <0x68>;
gpio-controller;
#gpio-cells = <2>;
};
pmic: pfuze100@08 {
compatible = "fsl,pfuze100";
reg = <0x08>;
regulators {
sw1a_reg: sw1ab {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw1c_reg: sw1c {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw2_reg: sw2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
sw3a_reg: sw3a {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-boot-on;
regulator-always-on;
};
sw3b_reg: sw3b {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-boot-on;
regulator-always-on;
};
sw4_reg: sw4 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
};
swbst_reg: swbst {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5150000>;
};
snvs_reg: vsnvs {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <3000000>;
regulator-boot-on;
regulator-always-on;
};
vref_reg: vrefddr {
regulator-boot-on;
regulator-always-on;
};
vgen1_reg: vgen1 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
regulator-always-on;
};
vgen2_reg: vgen2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
};
vgen3_reg: vgen3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen4_reg: vgen4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen5_reg: vgen5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen6_reg: vgen6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
};
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c3_2>;
pinctrl-1 = <&pinctrl_i2c3_2_gpio>;
scl-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
status = "okay";
max7310_a: gpio@30 {
compatible = "maxim,max7310";
reg = <0x30>;
gpio-controller;
#gpio-cells = <2>;
resets = <&max7310_reset>;
};
max7310_b: gpio@32 {
compatible = "maxim,max7310";
reg = <0x32>;
gpio-controller;
#gpio-cells = <2>;
resets = <&max7310_reset>;
};
mma8451@1c {
compatible = "fsl,mma8451";
reg = <0x1c>;
position = <7>;
interrupt-parent = <&gpio3>;
interrupts = <24 8>;
interrupt-route = <1>;
};
mag3110@0e {
compatible = "fsl,mag3110";
reg = <0x0e>;
position = <2>;
interrupt-parent = <&gpio6>;
interrupts = <6 1>;
};
isl29023@44 {
compatible = "fsl,isl29023";
reg = <0x44>;
rext = <499>;
interrupt-parent = <&gpio3>;
interrupts = <23 2>;
};
};
&lcdif2 {
display = <&display1>;
disp-dev = "ldb";
status = "okay";
display1: display {
bits-per-pixel = <16>;
bus-width = <18>;
};
};
&ldb {
status = "okay";
lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
crtc = "lcdif2";
status = "okay";
display-timings {
native-mode = <&timing1>;
timing1: hsd100pxn1 {
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
hback-porch = <220>;
hfront-porch = <40>;
vback-porch = <21>;
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
};
};
};
};
&mlb {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mlb_2>;
status = "okay";
};
&pcie {
reset-gpio = <&max7310_b 3 0>;
status = "okay";
};
&qspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi1_1>;
status = "okay";
ddrsmp=<2>;
flash0: n25q256a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <29000000>;
reg = <0>;
};
flash1: n25q256a@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <29000000>;
reg = <1>;
};
};
&spdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spdif_3>;
status = "okay";
};
&ssi2 {
fsl,mode = "i2s-master";
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2_1>;
status = "okay";
};
&uart5 { /* for bluetooth */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5_1>;
fsl,uart-has-rtscts;
status = "okay";
/* for DTE mode, add below change */
/* fsl,dte-mode;*/
/* pinctrl-0 = <&pinctrl_uart5dte_1>; */
};
&usbotg1 {
vbus-supply = <&reg_usb_otg1_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_otg1_id>;
srp-disable;
hnp-disable;
adp-disable;
status = "okay";
};
&usbotg2 {
vbus-supply = <&reg_usb_otg2_vbus>;
dr_mode = "host";
status = "okay";
};
&usdhc3 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
bus-width = <8>;
cd-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
keep-power-in-suspend;
enable-sdio-wakeup;
vmmc-supply = <&vcc_sd3>;
status = "okay";
};
&usdhc4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc4>;
bus-width = <8>;
cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>;
no-1-8-v;
keep-power-in-suspend;
enable-sdio-wakup;
status = "okay";
};
&pwm4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm4_0>;
status = "okay";
};
&pxp {
status = "okay";
};
&iomuxc {
imx6x-sabreauto {
pinctrl_audmux_3: audmux-3 {
fsl,pins = <
MX6SX_PAD_SD1_CMD__AUDMUX_AUD5_RXC 0x130b0
MX6SX_PAD_SD1_CLK__AUDMUX_AUD5_RXFS 0x130b0
MX6SX_PAD_SD1_DATA3__AUDMUX_AUD5_RXD 0x130b0
>;
};
pinctrl_egalax_int: egalax_intgrp {
fsl,pins = <
MX6SX_PAD_SD4_RESET_B__GPIO6_IO_22 0x80000000
>;
};
pinctrl_enet1_1: enet1grp-1 {
fsl,pins = <
MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0xa0b1
MX6SX_PAD_ENET1_MDC__ENET1_MDC 0xa0b1
MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC 0xa0b9
MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0xa0b1
MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0xa0b1
MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2 0xa0b1
MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3 0xa0b1
MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0xa0b1
MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK 0x3081
MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x3081
MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x3081
MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2 0x3081
MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081
MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081
>;
};
pinctrl_enet2_1: enet2grp-1 {
fsl,pins = <
MX6SX_PAD_RGMII2_TXC__ENET2_RGMII_TXC 0xa0b9
MX6SX_PAD_RGMII2_TD0__ENET2_TX_DATA_0 0xa0b1
MX6SX_PAD_RGMII2_TD1__ENET2_TX_DATA_1 0xa0b1
MX6SX_PAD_RGMII2_TD2__ENET2_TX_DATA_2 0xa0b1
MX6SX_PAD_RGMII2_TD3__ENET2_TX_DATA_3 0xa0b1
MX6SX_PAD_RGMII2_TX_CTL__ENET2_TX_EN 0xa0b1
MX6SX_PAD_RGMII2_RXC__ENET2_RX_CLK 0x3081
MX6SX_PAD_RGMII2_RD0__ENET2_RX_DATA_0 0x3081
MX6SX_PAD_RGMII2_RD1__ENET2_RX_DATA_1 0x3081
MX6SX_PAD_RGMII2_RD2__ENET2_RX_DATA_2 0x3081
MX6SX_PAD_RGMII2_RD3__ENET2_RX_DATA_3 0x3081
MX6SX_PAD_RGMII2_RX_CTL__ENET2_RX_EN 0x3081
>;
};
pinctrl_esai_2: esaigrp-2 {
fsl,pins = <
MX6SX_PAD_CSI_DATA00__ESAI_TX_CLK 0x1b030
MX6SX_PAD_CSI_DATA01__ESAI_TX_FS 0x1b030
MX6SX_PAD_CSI_HSYNC__ESAI_TX0 0x1b030
MX6SX_PAD_CSI_DATA04__ESAI_TX1 0x1b030
MX6SX_PAD_CSI_DATA06__ESAI_TX2_RX3 0x1b030
MX6SX_PAD_CSI_DATA07__ESAI_TX3_RX2 0x1b030
MX6SX_PAD_CSI_DATA02__ESAI_RX_CLK 0x1b030
MX6SX_PAD_CSI_DATA03__ESAI_RX_FS 0x1b030
MX6SX_PAD_CSI_VSYNC__ESAI_TX5_RX0 0x1b030
MX6SX_PAD_CSI_DATA05__ESAI_TX4_RX1 0x1b030
>;
};
pinctrl_flexcan1: flexcan1grp-1 {
fsl,pins = <
MX6SX_PAD_QSPI1B_DQS__CAN1_TX 0x1b020
MX6SX_PAD_QSPI1A_SS1_B__CAN1_RX 0x1b020
>;
};
pinctrl_flexcan2: flexcan2grp-1 {
fsl,pins = <
MX6SX_PAD_QSPI1B_SS1_B__CAN2_RX 0x1b020
MX6SX_PAD_QSPI1A_DQS__CAN2_TX 0x1b020
>;
};
pinctrl_gpmi_nand_1: gpmi-nand-1 {
fsl,pins = <
MX6SX_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1
MX6SX_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1
MX6SX_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1
MX6SX_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000
MX6SX_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1
MX6SX_PAD_NAND_CE1_B__RAWNAND_CE1_B 0xb0b1
MX6SX_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1
MX6SX_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1
MX6SX_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1
MX6SX_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1
MX6SX_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1
MX6SX_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1
MX6SX_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1
MX6SX_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1
MX6SX_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1
MX6SX_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1
>;
};
pinctrl_i2c2_1: i2c2grp-1 {
fsl,pins = <
MX6SX_PAD_GPIO1_IO03__I2C2_SDA 0x4001b8b1
MX6SX_PAD_GPIO1_IO02__I2C2_SCL 0x4001b8b1
>;
};
pinctrl_i2c2_1_gpio: i2c2grp-1-gpio {
fsl,pins = <
MX6SX_PAD_GPIO1_IO03__GPIO1_IO_3 0x1b8b1
MX6SX_PAD_GPIO1_IO02__GPIO1_IO_2 0x1b8b1
>;
};
pinctrl_i2c3_2: i2c3grp-2 {
fsl,pins = <
MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1
MX6SX_PAD_KEY_COL4__I2C3_SCL 0x4001b8b1
>;
};
pinctrl_i2c3_2_gpio: i2c3grp-2-gpio {
fsl,pins = <
MX6SX_PAD_KEY_ROW4__GPIO2_IO_19 0x1b8b1
MX6SX_PAD_KEY_COL4__GPIO2_IO_14 0x1b8b1
>;
};
pinctrl_mlb_2: mlbgrp-2 {
fsl,pins = <
MX6SX_PAD_ENET2_RX_CLK__MLB_DATA 0x31
MX6SX_PAD_ENET2_CRS__MLB_SIG 0x31
MX6SX_PAD_ENET2_TX_CLK__MLB_CLK 0x31
>;
};
pinctrl_pwm4_0: pwm4grp-0 {
fsl,pins = <
MX6SX_PAD_SD1_DATA1__PWM4_OUT 0x110b0
>;
};
pinctrl_qspi1_1: qspi1grp_1 {
fsl,pins = <
MX6SX_PAD_QSPI1A_DATA0__QSPI1_A_DATA_0 0x70a1
MX6SX_PAD_QSPI1A_DATA1__QSPI1_A_DATA_1 0x70a1
MX6SX_PAD_QSPI1A_DATA2__QSPI1_A_DATA_2 0x70a1
MX6SX_PAD_QSPI1A_DATA3__QSPI1_A_DATA_3 0x70a1
MX6SX_PAD_QSPI1A_SCLK__QSPI1_A_SCLK 0x70a1
MX6SX_PAD_QSPI1A_SS0_B__QSPI1_A_SS0_B 0x70a1
MX6SX_PAD_QSPI1B_DATA0__QSPI1_B_DATA_0 0x70a1
MX6SX_PAD_QSPI1B_DATA1__QSPI1_B_DATA_1 0x70a1
MX6SX_PAD_QSPI1B_DATA2__QSPI1_B_DATA_2 0x70a1
MX6SX_PAD_QSPI1B_DATA3__QSPI1_B_DATA_3 0x70a1
MX6SX_PAD_QSPI1B_SCLK__QSPI1_B_SCLK 0x70a1
MX6SX_PAD_QSPI1B_SS0_B__QSPI1_B_SS0_B 0x70a1
>;
};
pinctrl_spdif_3: spdifgrp-3 {
fsl,pins = <
MX6SX_PAD_ENET2_COL__SPDIF_IN 0x1b0b0
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1
MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1
>;
};
pinctrl_uart2_1: uart2grp-1 {
fsl,pins = <
MX6SX_PAD_GPIO1_IO07__UART2_RX 0x1b0b1
MX6SX_PAD_GPIO1_IO06__UART2_TX 0x1b0b1
>;
};
pinctrl_uart5_1: uart5grp-1 {
fsl,pins = <
MX6SX_PAD_KEY_ROW3__UART5_RX 0x1b0b1
MX6SX_PAD_KEY_COL3__UART5_TX 0x1b0b1
MX6SX_PAD_KEY_ROW2__UART5_CTS_B 0x1b0b1
MX6SX_PAD_KEY_COL2__UART5_RTS_B 0x1b0b1
>;
};
pinctrl_uart5dte_1: uart5dtegrp-1 {
fsl,pins = <
MX6SX_PAD_KEY_ROW3__UART5_TX 0x1b0b1
MX6SX_PAD_KEY_COL3__UART5_RX 0x1b0b1
MX6SX_PAD_KEY_ROW2__UART5_RTS_B 0x1b0b1
MX6SX_PAD_KEY_COL2__UART5_CTS_B 0x1b0b1
>;
};
pinctrl_usb_otg1_vbus: usbotg1vbusgrp {
fsl,pins = <
MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x10b0
>;
};
pinctrl_usb_otg1_id: usbotg1idgrp {
fsl,pins = <
MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID 0x17059
>;
};
pinctrl_usb_otg2_vbus: usbotg2vbusgrp {
fsl,pins = <
MX6SX_PAD_GPIO1_IO12__GPIO1_IO_12 0x10b0
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17059
MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10059
MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17059
MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17059
MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17059
MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17059
MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17059
MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17059
MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17059
MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17059
MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 /* CD */
MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */
>;
};
pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
fsl,pins = <
MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170b9
MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100b9
MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170b9
MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170b9
MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170b9
MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170b9
MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170b9
MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170b9
MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170b9
MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170b9
>;
};
pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
fsl,pins = <
MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170f9
MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100f9
MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170f9
MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170f9
MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170f9
MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170f9
MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170f9
MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170f9
MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170f9
MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170f9
>;
};
pinctrl_usdhc4: usdhc4grp {
fsl,pins = <
MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17071
MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10071
MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17071
MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17071
MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17071
MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17071
MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17071 /* CD */
MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17071 /* WP */
>;
};
pinctrl_vcc_sd3: vccsd3grp {
fsl,pins = <
MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059
>;
};
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY 0x30b0
>;
};
};
};
&csi2 {
status = "okay";
port {
csi2_ep: endpoint {
remote-endpoint = <&vadc_ep>;
};
};
};
&dcic1 {
dcic_id = <0>;
dcic_mux = "dcic-lcdif1";
status = "okay";
};
&dcic2 {
dcic_id = <1>;
dcic_mux = "dcic-lvds";
status = "okay";
nand-on-flash-bbt;
};
&vadc {
vadc_in = <0>;
csi_id = <1>;
status = "okay";
port {
vadc_ep: endpoint {
remote-endpoint = <&csi2_ep>;
};
};
};
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
fsl,wdog_b;
};