| /* |
| * Copyright 2016 Freescale Semiconductor, Inc. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| |
| /dts-v1/; |
| |
| #include "imx7ulp.dtsi" |
| |
| / { |
| model = "NXP i.MX7ULP EVK"; |
| compatible = "fsl,imx7ulp-evk", "fsl,imx7ulp", "Generic DT based system"; |
| |
| chosen { |
| bootargs = "console=ttyLP0,115200 earlycon=lpuart32,0x402D0000,115200"; |
| stdout-path = &lpuart4; |
| }; |
| |
| bcmdhd_wlan_0: bcmdhd_wlan@0 { |
| compatible = "android,bcmdhd_wlan"; |
| wlreg_on-supply = <&wlreg_on>; |
| bcmdhd_fw = "/lib/firmware/bcm/1DX_BCM4343W/fw_bcmdhd.bin"; |
| bcmdhd_nv = "/lib/firmware/bcm/1DX_BCM4343W/bcmdhd.1DX.SDIO.cal"; |
| }; |
| |
| memory { |
| device_type = "memory"; |
| reg = <0x60000000 0x40000000>; |
| }; |
| |
| backlight { |
| compatible = "gpio-backlight"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_backlight>; |
| gpios = <&gpio3 2 GPIO_ACTIVE_HIGH>; |
| default-on; |
| status = "okay"; |
| }; |
| |
| mipi_dsi_reset: mipi-dsi-reset { |
| compatible = "gpio-reset"; |
| reset-gpios = <&gpio0 19 GPIO_ACTIVE_LOW>; |
| reset-delay-us = <1000>; |
| #reset-cells = <0>; |
| }; |
| |
| regulators { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| wlreg_on: fixedregulator@100 { |
| compatible = "regulator-fixed"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| regulator-name = "wlreg_on"; |
| gpio = <&gpio2 6 GPIO_ACTIVE_HIGH>; |
| startup-delay-us = <100>; |
| enable-active-high; |
| }; |
| |
| reg_usb_otg1_vbus: regulator@0 { |
| compatible = "regulator-fixed"; |
| reg = <0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usbotg1_vbus>; |
| regulator-name = "usb_otg1_vbus"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| gpio = <&gpio0 0 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| }; |
| |
| reg_vsd_3v3: regulator@1 { |
| compatible = "regulator-fixed"; |
| reg = <1>; |
| regulator-name = "VSD_3V3"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| }; |
| |
| }; |
| |
| pf1550-rpmsg { |
| compatible = "fsl,pf1550-rpmsg"; |
| sw1_reg: SW1 { |
| regulator-name = "SW1"; |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <1387500>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| sw2_reg: SW2 { |
| regulator-name = "SW2"; |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <1387500>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| sw3_reg: SW3 { |
| regulator-name = "SW3"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| vref_reg: VREFDDR { |
| regulator-name = "VREFDDR"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| vldo1_reg: LDO1 { |
| regulator-name = "LDO1"; |
| regulator-min-microvolt = <750000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| vldo2_reg: LDO2 { |
| regulator-name = "LDO2"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| vldo3_reg: LDO3 { |
| regulator-name = "LDO3"; |
| regulator-min-microvolt = <750000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| }; |
| }; |
| |
| &iomuxc1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_hog_1>; |
| |
| imx7ulp-evk { |
| pinctrl_hog_1: hoggrp-1 { |
| fsl,pins = < |
| IMX7ULP_PAD_PTC1__PTC1 0x20000 |
| >; |
| }; |
| |
| pinctrl_backlight: backlight_grp { |
| fsl,pins = < |
| IMX7ULP_PAD_PTF2__PTF2 0x20100 |
| >; |
| }; |
| |
| pinctrl_lpi2c5: lpi2c5grp { |
| fsl,pins = < |
| IMX7ULP_PAD_PTC4__LPI2C5_SCL 0x27 |
| IMX7ULP_PAD_PTC5__LPI2C5_SDA 0x27 |
| >; |
| }; |
| |
| pinctrl_mipi_dsi_reset: mipi_dsi_reset_grp { |
| fsl,pins = < |
| IMX7ULP_PAD_PTC19__PTC19 0x20003 |
| >; |
| }; |
| |
| pinctrl_lpuart4: lpuart4grp { |
| fsl,pins = < |
| IMX7ULP_PAD_PTC3__LPUART4_RX 0x3 |
| IMX7ULP_PAD_PTC2__LPUART4_TX 0x3 |
| >; |
| }; |
| |
| pinctrl_lpuart6: lpuart6grp { |
| fsl,pins = < |
| IMX7ULP_PAD_PTE10__LPUART6_TX 0x3 |
| IMX7ULP_PAD_PTE11__LPUART6_RX 0x3 |
| IMX7ULP_PAD_PTE9__LPUART6_RTS_B 0x3 |
| IMX7ULP_PAD_PTE8__LPUART6_CTS_B 0x3 |
| IMX7ULP_PAD_PTE7__PTE7 0x20000 /* BT_REG_ON */ |
| >; |
| }; |
| |
| pinctrl_lpuart7: lpuart7grp { |
| fsl,pins = < |
| IMX7ULP_PAD_PTF14__LPUART7_TX 0x3 |
| IMX7ULP_PAD_PTF15__LPUART7_RX 0x3 |
| IMX7ULP_PAD_PTF13__LPUART7_RTS_B 0x3 |
| IMX7ULP_PAD_PTF12__LPUART7_CTS_B 0x3 |
| >; |
| }; |
| |
| pinctrl_usdhc0: usdhc0grp { |
| fsl,pins = < |
| IMX7ULP_PAD_PTD1__SDHC0_CMD 0x43 |
| IMX7ULP_PAD_PTD2__SDHC0_CLK 0x10042 |
| IMX7ULP_PAD_PTD7__SDHC0_D3 0x43 |
| IMX7ULP_PAD_PTD8__SDHC0_D2 0x43 |
| IMX7ULP_PAD_PTD9__SDHC0_D1 0x43 |
| IMX7ULP_PAD_PTD10__SDHC0_D0 0x43 |
| IMX7ULP_PAD_PTC10__PTC10 0x10000 /* USDHC0 CD */ |
| IMX7ULP_PAD_PTD0__PTD0 0x20000 /* USDHC0 RST */ |
| >; |
| }; |
| |
| pinctrl_usdhc0_8bit: usdhc0grp_8bit { |
| fsl,pins = < |
| IMX7ULP_PAD_PTD1__SDHC0_CMD 0x43 |
| IMX7ULP_PAD_PTD2__SDHC0_CLK 0x10042 |
| IMX7ULP_PAD_PTD3__SDHC0_D7 0x43 |
| IMX7ULP_PAD_PTD4__SDHC0_D6 0x43 |
| IMX7ULP_PAD_PTD5__SDHC0_D5 0x43 |
| IMX7ULP_PAD_PTD6__SDHC0_D4 0x43 |
| IMX7ULP_PAD_PTD7__SDHC0_D3 0x43 |
| IMX7ULP_PAD_PTD8__SDHC0_D2 0x43 |
| IMX7ULP_PAD_PTD9__SDHC0_D1 0x43 |
| IMX7ULP_PAD_PTD10__SDHC0_D0 0x43 |
| IMX7ULP_PAD_PTD11__SDHC0_DQS 0x42 |
| >; |
| }; |
| |
| pinctrl_lpi2c7: lpi2c7grp { |
| fsl,pins = < |
| IMX7ULP_PAD_PTF12__LPI2C7_SCL 0x27 |
| IMX7ULP_PAD_PTF13__LPI2C7_SDA 0x27 |
| >; |
| }; |
| |
| pinctrl_lpspi3: lpspi3grp { |
| fsl,pins = < |
| IMX7ULP_PAD_PTF16__LPSPI3_SIN 0x0 |
| IMX7ULP_PAD_PTF17__LPSPI3_SOUT 0x0 |
| IMX7ULP_PAD_PTF18__LPSPI3_SCK 0x0 |
| IMX7ULP_PAD_PTF19__LPSPI3_PCS0 0x0 |
| >; |
| }; |
| |
| pinctrl_usbotg1_vbus: otg1vbusgrp { |
| fsl,pins = < |
| IMX7ULP_PAD_PTC0__PTC0 0x20000 |
| >; |
| }; |
| |
| pinctrl_usbotg1_id: otg1idgrp { |
| fsl,pins = < |
| IMX7ULP_PAD_PTC13__USB0_ID 0x10003 |
| >; |
| }; |
| |
| pinctrl_usdhc1: usdhc1grp { |
| fsl,pins = < |
| IMX7ULP_PAD_PTE3__SDHC1_CMD 0x43 |
| IMX7ULP_PAD_PTE2__SDHC1_CLK 0x10042 |
| IMX7ULP_PAD_PTE1__SDHC1_D0 0x43 |
| IMX7ULP_PAD_PTE0__SDHC1_D1 0x43 |
| IMX7ULP_PAD_PTE5__SDHC1_D2 0x43 |
| IMX7ULP_PAD_PTE4__SDHC1_D3 0x43 |
| >; |
| }; |
| |
| pinctrl_usdhc1_rst: usdhc1grp_rst { |
| fsl,pins = < |
| IMX7ULP_PAD_PTE11__PTE11 0x20000 /* USDHC1 RST */ |
| IMX7ULP_PAD_PTE13__PTE13 0x10003 /* USDHC1 CD */ |
| IMX7ULP_PAD_PTE12__PTE12 0x10003 /* USDHC1 WP */ |
| IMX7ULP_PAD_PTE14__SDHC1_VS 0x43 /* USDHC1 VSEL */ |
| >; |
| }; |
| |
| pinctrl_dsi_hdmi: dsi_hdmi_grp { |
| fsl,pins = < |
| IMX7ULP_PAD_PTC18__PTC18 0x10003 /* DSI_HDMI_INT */ |
| >; |
| }; |
| }; |
| }; |
| |
| &lcdif { |
| status = "okay"; |
| disp-dev = "mipi_dsi_northwest"; |
| display = <&display0>; |
| |
| display0: display@0 { |
| bits-per-pixel = <16>; |
| bus-width = <24>; |
| |
| display-timings { |
| native-mode = <&timing0>; |
| timing0: timing0 { |
| clock-frequency = <9200000>; |
| hactive = <480>; |
| vactive = <272>; |
| hfront-porch = <8>; |
| hback-porch = <4>; |
| hsync-len = <41>; |
| vback-porch = <2>; |
| vfront-porch = <4>; |
| vsync-len = <10>; |
| |
| hsync-active = <0>; |
| vsync-active = <0>; |
| de-active = <1>; |
| pixelclk-active = <0>; |
| }; |
| }; |
| }; |
| }; |
| |
| &lpi2c7 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_lpi2c7>; |
| }; |
| |
| &lpi2c5 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_lpi2c5>; |
| status = "okay"; |
| }; |
| |
| &lpspi3 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_lpspi3>; |
| status = "okay"; |
| |
| spidev0: spi@0 { |
| reg = <0>; |
| compatible = "rohm,dh2228fv"; |
| spi-max-frequency = <1000000>; |
| }; |
| }; |
| |
| &mipi_dsi { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_mipi_dsi_reset>; |
| lcd_panel = "TRULY-WVGA-TFT3P5581E"; |
| resets = <&mipi_dsi_reset>; |
| status = "okay"; |
| }; |
| |
| &lpuart4 { /* console */ |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_lpuart4>; |
| status = "okay"; |
| }; |
| |
| &lpuart6 { /* BT */ |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_lpuart6>; |
| status = "okay"; |
| }; |
| |
| &lpuart7 { /* Uart test */ |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_lpuart7>; |
| status = "disabled"; |
| }; |
| |
| &rpmsg{ |
| status = "okay"; |
| }; |
| |
| &usbotg1 { |
| vbus-supply = <®_usb_otg1_vbus>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usbotg1_id>; |
| srp-disable; |
| hnp-disable; |
| adp-disable; |
| status = "okay"; |
| }; |
| |
| &usbphy1 { |
| fsl,tx-d-cal = <88>; |
| }; |
| |
| &usdhc0 { |
| pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; |
| pinctrl-0 = <&pinctrl_usdhc0>; |
| pinctrl-1 = <&pinctrl_usdhc0>; |
| pinctrl-2 = <&pinctrl_usdhc0>; |
| pinctrl-3 = <&pinctrl_usdhc0>; |
| cd-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; |
| vmmc-supply = <®_vsd_3v3>; |
| vqmmc-supply = <&vldo2_reg>; |
| status = "okay"; |
| }; |
