| /* |
| * Copyright 2015 Freescale Semiconductor, Inc. |
| * |
| * The code contained herein is licensed under the GNU General Public |
| * License. You may obtain a copy of the GNU General Public License |
| * Version 2 or later at the following locations: |
| * |
| * http://www.opensource.org/licenses/gpl-license.html |
| * http://www.gnu.org/copyleft/gpl.html |
| */ |
| |
| /dts-v1/; |
| #include <dt-bindings/gpio/gpio.h> |
| #include "imx6q.dtsi" |
| |
| / { |
| model = "Freescale i.MX6 Quad Armadillo2 Board"; |
| compatible = "fsl,imx6q-pop-arm2", "fsl,imx6q"; |
| |
| aliases { |
| mxcfb0 = &mxcfb1; |
| mxcfb1 = &mxcfb2; |
| }; |
| |
| pwm-backlight { |
| compatible = "pwm-backlight"; |
| pwms = <&pwm1 0 50000>; |
| power-supply = <®_lvds_3p3v>; |
| brightness-levels = < |
| 0 1 2 3 4 5 6 7 8 9 |
| 10 11 12 13 14 15 16 17 18 19 |
| 20 21 22 23 24 25 26 27 28 29 |
| 30 31 32 33 34 35 36 37 38 39 |
| 40 41 42 43 44 45 46 47 48 49 |
| 50 51 52 53 54 55 56 57 58 59 |
| 60 61 62 63 64 65 66 67 68 69 |
| 70 71 72 73 74 75 76 77 78 79 |
| 80 81 82 83 84 85 86 87 88 89 |
| 90 91 92 93 94 95 96 97 98 99 |
| 100 |
| >; |
| default-brightness-level = <94>; |
| status = "okay"; |
| }; |
| |
| gpio-keys { |
| compatible = "gpio-keys"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_gpio_keys>; |
| |
| power { |
| label = "Power Button"; |
| gpios = <&gpio3 30 1>; |
| linux,code = <116>; |
| gpio-key,wakeup; |
| }; |
| }; |
| |
| hannstar_cabc { |
| compatible = "hannstar,cabc"; |
| lvds_share { |
| gpios = <&max7310_a 0 GPIO_ACTIVE_HIGH>; |
| }; |
| }; |
| |
| memory { |
| linux,usable-memory = <0x10000000 0x20000000>, |
| <0x80000000 0x20000000>; |
| }; |
| |
| mxcfb1: fb@0 { |
| compatible = "fsl,mxc_sdc_fb"; |
| disp_dev = "ldb"; |
| interface_pix_fmt = "RGB666"; |
| default_bpp = <16>; |
| int_clk = <0>; |
| late_init = <0>; |
| status = "okay"; |
| }; |
| |
| mxcfb2: fb@1 { |
| compatible = "fsl,mxc_sdc_fb"; |
| disp_dev = "hdmi"; |
| interface_pix_fmt = "RGB24"; |
| mode_str = "1920x1080M@60"; |
| default_bpp = <24>; |
| int_clk = <0>; |
| late_init = <0>; |
| status = "okay"; |
| }; |
| |
| sound-hdmi { |
| compatible = "fsl,imx6q-audio-hdmi", "fsl,imx-audio-hdmi"; |
| model = "imx-audio-hdmi"; |
| hdmi-controller = <&hdmi_audio>; |
| }; |
| |
| regulators { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| reg_3p3v: regulator@0 { |
| compatible = "regulator-fixed"; |
| reg = <0>; |
| regulator-name = "3P3V"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| reg_usb_otg_vbus: regulator@1 { |
| compatible = "regulator-fixed"; |
| reg = <1>; |
| regulator-name = "usb_otg_vbus"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| gpio = <&gpio3 22 0>; |
| enable-active-high; |
| }; |
| |
| reg_lvds_3p3v: regulator@2 { |
| compatible = "regulator-fixed"; |
| reg = <2>; |
| regulator-name = "LVDS-3P3V"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| gpio = <&max7310_b 1 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| regulator-always-on; |
| }; |
| }; |
| }; |
| |
| &cpu0 { |
| fsl,arm-soc-shared = <1>; |
| }; |
| |
| &busfreq { |
| fsl,max_ddr_freq = <400000000>; |
| }; |
| |
| &dcic1 { |
| dcic_id = <0>; |
| dcic_mux = "dcic-hdmi"; |
| status = "okay"; |
| }; |
| |
| &dcic2 { |
| dcic_id = <1>; |
| dcic_mux = "dcic-lvds0"; |
| status = "okay"; |
| }; |
| |
| &fec { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_enet>; |
| phy-mode = "rgmii"; |
| status = "okay"; |
| }; |
| |
| &hdmi_audio { |
| status = "okay"; |
| }; |
| |
| &hdmi_cec { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_hdmi_cec>; |
| status = "okay"; |
| }; |
| |
| &hdmi_core { |
| ipu_id = <0>; |
| disp_id = <1>; |
| status = "okay"; |
| }; |
| |
| &hdmi_video { |
| fsl,phy_reg_vlev = <0x0294>; |
| fsl,phy_reg_cksymtx = <0x800d>; |
| status = "okay"; |
| }; |
| |
| &i2c2 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c2>; |
| status = "okay"; |
| |
| hdmi_edid: edid@50 { |
| compatible = "fsl,imx6-hdmi-i2c"; |
| reg = <0x50>; |
| }; |
| |
| egalax_ts@04 { |
| compatible = "eeti,egalax_ts"; |
| reg = <0x04>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_egalax_int>; |
| interrupt-parent = <&gpio3>; |
| interrupts = <31 2>; |
| wakeup-gpios = <&gpio3 31 0>; |
| }; |
| }; |
| |
| &i2c3 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c3>; |
| status = "okay"; |
| |
| max7310_a: gpio@1b { |
| compatible = "maxim,max7310"; |
| reg = <0x1b>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| max7310_b: gpio@1f { |
| compatible = "maxim,max7310"; |
| reg = <0x1f>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| }; |
| |
| &iomuxc { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_hog>; |
| |
| imx6q-arm2 { |
| pinctrl_hog: hoggrp { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x80000000 |
| MX6QDL_PAD_GPIO_18__SD3_VSELECT 0x17059 |
| >; |
| }; |
| |
| pinctrl_enet: enetgrp { |
| fsl,pins = < |
| MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0 |
| MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0 |
| MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 |
| MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 |
| MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 |
| MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 |
| MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 |
| MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 |
| MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
| MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 |
| MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 |
| MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 |
| MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 |
| MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 |
| MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_gpio_keys: gpio_keysgrp { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_hdmi_cec: hdmicecgrp { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x108b0 |
| >; |
| }; |
| |
| pinctrl_hdmi_hdcp: hdmihdcpgrp { |
| fsl,pins = < |
| MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x4001b8b1 |
| MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1 |
| >; |
| }; |
| |
| pinctrl_i2c2: i2c2grp { |
| fsl,pins = < |
| MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 |
| MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 |
| >; |
| }; |
| |
| pinctrl_i2c3: i2c3grp { |
| fsl,pins = < |
| MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 |
| MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 |
| >; |
| }; |
| |
| pinctrl_egalax_int: egalax_intgrp { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x80000000 |
| >; |
| }; |
| |
| pinctrl_pwm1: pwm1grp { |
| fsl,pins = < |
| MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_uart2: uart2grp { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1 |
| MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1 |
| MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1 |
| MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_uart4: uart4grp { |
| fsl,pins = < |
| MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 |
| MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_usbotg: usbotggrp { |
| fsl,pins = < |
| MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 |
| >; |
| }; |
| |
| pinctrl_usdhc3: usdhc3grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 |
| MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 |
| MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 |
| MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 |
| MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 |
| MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 |
| MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 |
| MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 |
| MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 |
| MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 |
| >; |
| }; |
| |
| pinctrl_usdhc3_cdwp: usdhc3cdwp { |
| fsl,pins = < |
| MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000 |
| MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000 |
| >; |
| }; |
| |
| pinctrl_usdhc4: usdhc4grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 |
| MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 |
| MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 |
| MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 |
| MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 |
| MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 |
| MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 |
| MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 |
| MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 |
| MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 |
| >; |
| }; |
| }; |
| }; |
| |
| &ldb { |
| status = "okay"; |
| |
| lvds-channel@0 { |
| fsl,data-mapping = "spwg"; |
| fsl,data-width = <18>; |
| crtc = "ipu2-di0"; |
| primary; |
| status = "okay"; |
| |
| display-timings { |
| native-mode = <&timing0>; |
| timing0: hsd100pxn1 { |
| clock-frequency = <65000000>; |
| hactive = <1024>; |
| vactive = <768>; |
| hback-porch = <220>; |
| hfront-porch = <40>; |
| vback-porch = <21>; |
| vfront-porch = <7>; |
| hsync-len = <60>; |
| vsync-len = <10>; |
| }; |
| }; |
| }; |
| }; |
| |
| &pwm1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pwm1>; |
| status = "okay"; |
| }; |
| |
| &uart2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart2>; |
| fsl,dte-mode; |
| fsl,uart-has-rtscts; |
| status = "okay"; |
| }; |
| |
| &uart4 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart4>; |
| status = "okay"; |
| }; |
| |
| &usbotg { |
| vbus-supply = <®_usb_otg_vbus>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usbotg>; |
| disable-over-current; |
| srp-disable; |
| hnp-disable; |
| adp-disable; |
| status = "okay"; |
| }; |
| |
| &usdhc3 { |
| cd-gpios = <&gpio6 11 0>; |
| wp-gpios = <&gpio6 14 0>; |
| vmmc-supply = <®_3p3v>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usdhc3 |
| &pinctrl_usdhc3_cdwp>; |
| status = "okay"; |
| }; |
| |
| &usdhc4 { |
| non-removable; |
| vmmc-supply = <®_3p3v>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usdhc4>; |
| status = "okay"; |
| }; |
