| /* |
| * Copyright 2016 Beckhoff Automation |
| * Copyright 2011 Freescale Semiconductor, Inc. |
| * Copyright 2011 Linaro Ltd. |
| * |
| * The code contained herein is licensed under the GNU General Public |
| * License. You may obtain a copy of the GNU General Public License |
| * Version 2 or later at the following locations: |
| * |
| * http://www.opensource.org/licenses/gpl-license.html |
| * http://www.gnu.org/copyleft/gpl.html |
| */ |
| |
| #include "skeleton.dtsi" |
| #include "imx53-pinfunc.h" |
| #include <dt-bindings/clock/imx5-clock.h> |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/input/input.h> |
| #include <dt-bindings/interrupt-controller/irq.h> |
| |
| / { |
| aliases { |
| serial1 = &uart2; |
| gpio0 = &gpio1; |
| gpio1 = &gpio2; |
| gpio2 = &gpio3; |
| gpio3 = &gpio4; |
| gpio4 = &gpio5; |
| gpio5 = &gpio6; |
| gpio6 = &gpio7; |
| i2c0 = &i2c1; |
| i2c1 = &i2c2; |
| i2c2 = &i2c3; |
| mmc0 = &esdhc1; |
| mmc1 = &esdhc2; |
| }; |
| |
| tzic: tz-interrupt-controller@fffc000 { |
| compatible = "fsl,imx53-tzic", "fsl,tzic"; |
| interrupt-controller; |
| #interrupt-cells = <1>; |
| reg = <0x0fffc000 0x4000>; |
| }; |
| |
| soc { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "simple-bus"; |
| interrupt-parent = <&tzic>; |
| ranges; |
| |
| aips@50000000 { /* AIPS1 */ |
| compatible = "fsl,aips-bus", "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| reg = <0x50000000 0x10000000>; |
| ranges; |
| |
| spba@50000000 { |
| compatible = "fsl,spba-bus", "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| reg = <0x50000000 0x40000>; |
| ranges; |
| |
| esdhc1: esdhc@50004000 { |
| compatible = "fsl,imx53-esdhc"; |
| reg = <0x50004000 0x4000>; |
| interrupts = <1>; |
| clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>, |
| <&clks IMX5_CLK_DUMMY>, |
| <&clks IMX5_CLK_ESDHC1_PER_GATE>; |
| clock-names = "ipg", "ahb", "per"; |
| bus-width = <4>; |
| status = "disabled"; |
| }; |
| |
| esdhc2: esdhc@50008000 { |
| compatible = "fsl,imx53-esdhc"; |
| reg = <0x50008000 0x4000>; |
| interrupts = <2>; |
| clocks = <&clks IMX5_CLK_ESDHC2_IPG_GATE>, |
| <&clks IMX5_CLK_DUMMY>, |
| <&clks IMX5_CLK_ESDHC2_PER_GATE>; |
| clock-names = "ipg", "ahb", "per"; |
| bus-width = <4>; |
| status = "disabled"; |
| }; |
| }; |
| |
| iomuxc: iomuxc@53fa8000 { |
| compatible = "fsl,imx53-iomuxc"; |
| reg = <0x53fa8000 0x4000>; |
| }; |
| |
| gpr: iomuxc-gpr@53fa8000 { |
| compatible = "fsl,imx53-iomuxc-gpr", "syscon"; |
| reg = <0x53fa8000 0xc>; |
| }; |
| |
| uart2: serial@53fc0000 { |
| compatible = "fsl,imx7d-uart", "fsl,imx53-uart", "fsl,imx21-uart"; |
| reg = <0x53fc0000 0x4000>; |
| interrupts = <32>; |
| clocks = <&clks IMX5_CLK_UART2_IPG_GATE>, |
| <&clks IMX5_CLK_UART2_PER_GATE>; |
| clock-names = "ipg", "per"; |
| dmas = <&sdma 12 4 0>, <&sdma 13 4 0>; |
| dma-names = "rx", "tx"; |
| status = "disabled"; |
| }; |
| |
| clks: ccm@53fd4000{ |
| compatible = "fsl,imx53-ccm"; |
| reg = <0x53fd4000 0x4000>; |
| interrupts = <0 71 0x04 0 72 0x04>; |
| #clock-cells = <1>; |
| }; |
| |
| gpio1: gpio@53f84000 { |
| compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
| reg = <0x53f84000 0x4000>; |
| interrupts = <50 51>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| |
| gpio2: gpio@53f88000 { |
| compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
| reg = <0x53f88000 0x4000>; |
| interrupts = <52 53>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| |
| gpio3: gpio@53f8c000 { |
| compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
| reg = <0x53f8c000 0x4000>; |
| interrupts = <54 55>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| |
| gpio4: gpio@53f90000 { |
| compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
| reg = <0x53f90000 0x4000>; |
| interrupts = <56 57>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| |
| gpio5: gpio@53fdc000 { |
| compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
| reg = <0x53fdc000 0x4000>; |
| interrupts = <103 104>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| |
| gpio6: gpio@53fe0000 { |
| compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
| reg = <0x53fe0000 0x4000>; |
| interrupts = <105 106>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| |
| gpio7: gpio@53fe4000 { |
| compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
| reg = <0x53fe4000 0x4000>; |
| interrupts = <107 108>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| |
| i2c3: i2c@53fec000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; |
| reg = <0x53fec000 0x4000>; |
| interrupts = <64>; |
| clocks = <&clks IMX5_CLK_I2C3_GATE>; |
| status = "disabled"; |
| }; |
| }; |
| |
| aips@60000000 { /* AIPS2 */ |
| compatible = "fsl,aips-bus", "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| reg = <0x60000000 0x10000000>; |
| ranges; |
| |
| sdma: sdma@63fb0000 { |
| compatible = "fsl,imx53-sdma", "fsl,imx35-sdma"; |
| reg = <0x63fb0000 0x4000>; |
| interrupts = <6>; |
| clocks = <&clks IMX5_CLK_SDMA_GATE>, |
| <&clks IMX5_CLK_SDMA_GATE>; |
| clock-names = "ipg", "ahb"; |
| #dma-cells = <3>; |
| fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; |
| }; |
| |
| fec: ethernet@63fec000 { |
| compatible = "fsl,imx53-fec", "fsl,imx25-fec"; |
| reg = <0x63fec000 0x4000>; |
| interrupts = <87>; |
| clocks = <&clks IMX5_CLK_FEC_GATE>, |
| <&clks IMX5_CLK_FEC_GATE>, |
| <&clks IMX5_CLK_FEC_GATE>; |
| clock-names = "ipg", "ahb", "ptp"; |
| status = "disabled"; |
| }; |
| |
| i2c2: i2c@63fc4000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; |
| reg = <0x63fc4000 0x4000>; |
| interrupts = <63>; |
| clocks = <&clks IMX5_CLK_I2C2_GATE>; |
| status = "disabled"; |
| }; |
| |
| i2c1: i2c@63fc8000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; |
| reg = <0x63fc8000 0x4000>; |
| interrupts = <62>; |
| clocks = <&clks IMX5_CLK_I2C1_GATE>; |
| status = "disabled"; |
| }; |
| }; |
| }; |
| }; |
