| /* |
| * Copyright (C) 2014 DENX Software Engineering GmbH |
| * Heiko Schocher <hs@denx.de> |
| * |
| * Based on: |
| * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| /dts-v1/; |
| |
| #include "am33xx.dtsi" |
| #include <dt-bindings/input/input.h> |
| |
| / { |
| model = "RUT"; |
| compatible = "ti,am335x-evm", "ti,am33xx"; |
| |
| buzzer { |
| compatible = "pwm-beeper"; |
| pwms = <&ecap0 0 16000 0>; |
| }; |
| |
| chosen { |
| stdout-path = &uart0; |
| tick-timer = &timer2; |
| }; |
| |
| cpus { |
| cpu@0 { |
| cpu0-supply = <&dcdc2_reg>; |
| }; |
| }; |
| |
| gpio_keys: powerfail-keys { |
| compatible = "gpio-keys"; |
| autorepeat; |
| |
| pwr-fail0 { |
| label = "power-fail"; |
| linux,code = <KEY_POWER>; |
| gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>; |
| gpio-key,wakeup; |
| }; |
| |
| pwr-fail1 { |
| label = "power-fail-redundant"; |
| linux,code = <KEY_POWER>; |
| gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>; |
| gpio-key,wakeup; |
| }; |
| }; |
| |
| leds { |
| compatible = "gpio-leds"; |
| |
| led_green { |
| label = "rut:green:debug:run_mode"; |
| gpios = <&gpio3 20 1>; |
| /* activelow = 1, default trigger heartbeat */ |
| }; |
| led_yellow { |
| label = "rut:debug:yellow:osc_ch1"; |
| gpios = <&gpio0 17 1>; |
| /* activelow = 1, default trigger mmc0 */ |
| }; |
| led_red { |
| label = "rut:debug:red:osc_ch2"; |
| gpios = <&gpio0 16 1>; |
| /* activelow = 1, default trigger debug_osc_ch2 */ |
| }; |
| /* optional */ |
| led_alive { |
| label = "rut:alive"; |
| gpios = <&gpio0 15 1>; |
| linux,default-trigger = "heartbeat"; |
| /* activelow = 1, default trigger heartbeat */ |
| }; |
| |
| }; |
| |
| memory { |
| device_type = "memory"; |
| reg = <0x80000000 0x10000000>; /* 256 MB */ |
| }; |
| |
| panel { |
| compatible = "ti,tilcdc,panel"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&lcd_pins_s0>; |
| status = "okay"; |
| |
| /* FORMIKE_KWH043ST20_F01 */ |
| panel-info { |
| ac-bias = <255>; |
| ac-bias-intrpt = <0>; |
| dma-burst-sz = <16>; |
| bpp = <16>; |
| fdd = <0x80>; |
| sync-edge = <0>; |
| sync-ctrl = <1>; |
| raster-order = <0>; |
| fifo-th = <0>; |
| tft-alt-mode = <0>; |
| invert-pxl-clk = <1>; |
| }; |
| |
| display-timings { |
| native-mode = <&timing1>; |
| timing1: 480x800p60 { |
| clock-frequency = <29925000>; |
| hactive = <480>; |
| vactive = <800>; |
| hfront-porch = <50>; |
| hback-porch = <50>; |
| hsync-len = <50>; |
| vback-porch = <50>; |
| vfront-porch = <50>; |
| vsync-len = <50>; |
| hsync-active = <1>; |
| vsync-active = <1>; |
| }; |
| }; |
| }; |
| |
| vmmc: fixedregulator3 { |
| compatible = "regulator-fixed"; |
| regulator-name = "vmmc"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| |
| watchdog { |
| compatible = "linux,wdt-gpio"; |
| gpios = <&gpio0 14 0>; |
| hw_algo = "level"; |
| hw_margin_ms = <30000>; |
| }; |
| }; |
| |
| &aes { |
| status = "okay"; |
| }; |
| |
| &cppi41dma { |
| status = "okay"; |
| }; |
| |
| &cpsw_emac0 { |
| phy_id = <&davinci_mdio>, <1>; |
| phy-mode = "rmii"; |
| }; |
| |
| &cpsw_emac1 { |
| phy_id = <&davinci_mdio>, <0>; |
| phy-mode = "rmii"; |
| }; |
| |
| &davinci_mdio { |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&davinci_mdio_default>; |
| pinctrl-1 = <&davinci_mdio_sleep>; |
| status = "okay"; |
| gpios = <&gpio2 18 0>; |
| |
| ethernet_phy: ethernet-phy@1 { |
| compatible = "ethernet-phy-id2000.5ce1"; |
| reg = <1>; |
| natsemi,master_mode_fixup; |
| }; |
| }; |
| |
| &elm { |
| status = "okay"; |
| }; |
| |
| &epwmss0 { |
| status = "okay"; |
| |
| ecap0: ecap@48300100 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&ecap0_pins>; |
| }; |
| }; |
| |
| &epwmss1 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&epwmss1_pins>; |
| }; |
| |
| &gpmc { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&nandflash_pins>; |
| status = "okay"; |
| |
| ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ |
| |
| nand@0,0 { |
| reg = <0 0 0>; /* CS0, offset 0 */ |
| nand-bus-width = <8>; |
| ti,nand-ecc-opt = "bch8"; |
| gpmc,device-nand = "true"; |
| gpmc,device-width = <1>; |
| gpmc,sync-clk-ps = <0>; |
| gpmc,cs-on-ns = <0>; |
| gpmc,cs-rd-off-ns = <57>; |
| gpmc,cs-wr-off-ns = <57>; |
| gpmc,adv-on-ns = <0>; |
| gpmc,adv-rd-off-ns = <57>; |
| gpmc,adv-wr-off-ns = <57>; |
| gpmc,we-on-ns = <0>; |
| gpmc,we-off-ns = <48>; |
| gpmc,oe-on-ns = <0>; |
| gpmc,oe-off-ns = <57>; |
| gpmc,access-ns = <38>; |
| gpmc,rd-cycle-ns = <67>; |
| gpmc,wr-cycle-ns = <67>; |
| gpmc,wait-on-read = "true"; |
| gpmc,wait-on-write = "true"; |
| gpmc,bus-turnaround-ns = <0>; |
| gpmc,cycle2cycle-delay-ns = <0>; |
| gpmc,clk-activation-ns = <0>; |
| gpmc,wait-monitoring-ns = <0>; |
| gpmc,wr-access-ns = <96>; |
| gpmc,wr-data-mux-bus-ns = <0>; |
| |
| #address-cells = <1>; |
| #size-cells = <1>; |
| elm_id = <&elm>; |
| }; |
| }; |
| |
| &i2c0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c0_pins>; |
| clock-frequency = <400000>; |
| status = "okay"; |
| |
| eeprom: eeprom@50 { |
| compatible = "atmel,24c128"; |
| reg = <0x50>; |
| pagesize = <32>; |
| }; |
| |
| tps: tps@24 { |
| reg = <0x24>; |
| }; |
| }; |
| |
| &i2c1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c1_pins>; |
| clock-frequency = <100000>; |
| status = "okay"; |
| |
| atmel: atmel_mxt_ts@4a { |
| compatible = "atmel,maxtouch"; |
| reg = <0x4a>; |
| interrupt-parent = <&gpio1>; |
| interrupts = <28 8>; |
| gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| temp@48 { |
| compatible = "st,ds75"; |
| reg = <0x4c>; |
| }; |
| }; |
| |
| &lcdc { |
| status = "okay"; |
| }; |
| |
| &mac { |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&cpsw_default>; |
| pinctrl-1 = <&cpsw_sleep>; |
| status = "okay"; |
| }; |
| |
| &mmc1 { |
| vmmc-supply = <&vmmc>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mmc1_pins>; |
| status = "okay"; |
| }; |
| |
| &phy_sel { |
| rmii-clock-ext; |
| }; |
| |
| &sham { |
| status = "okay"; |
| }; |
| |
| &spi0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spi0_pins>; |
| status = "okay"; |
| spi-flash@0 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "mx25l25635e"; |
| reg = <0>; /* Chip select 0 */ |
| spi-max-frequency = <24000000>; |
| |
| partition@0 { |
| label = "dummy"; |
| reg = <0x0000000 0x8000>; |
| }; |
| }; |
| }; |
| |
| &spi1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spi1_pins>; |
| status = "okay"; |
| |
| lcd_init: lcd@0 { |
| compatible = "formike,kwh043st20"; |
| reg = <0>; |
| reset-gpios = <&gpio3 19 0>; |
| spi-max-frequency = <1200000>; |
| spi-cpol; |
| spi-cpha; |
| power-on-delay = <10>; |
| reset-delay = <10>; |
| }; |
| }; |
| |
| /include/ "tps65217.dtsi" |
| |
| &tps { |
| backlight0: backlight { |
| isel = <1>; /* 1 - ISET1, 2 ISET2 */ |
| fdim = <1000>; /* TPS65217_BL_FDIM_100HZ */ |
| default-brightness = <80>; |
| }; |
| |
| regulators { |
| dcdc1_reg: regulator@0 { |
| regulator-always-on; |
| }; |
| |
| dcdc2_reg: regulator@1 { |
| /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ |
| regulator-name = "vdd_mpu"; |
| regulator-min-microvolt = <925000>; |
| regulator-max-microvolt = <1325000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| dcdc3_reg: regulator@2 { |
| /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ |
| regulator-name = "vdd_core"; |
| regulator-min-microvolt = <925000>; |
| regulator-max-microvolt = <1150000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| ldo1_reg: regulator@3 { |
| regulator-always-on; |
| }; |
| |
| ldo2_reg: regulator@4 { |
| regulator-always-on; |
| }; |
| |
| ldo3_reg: regulator@5 { |
| regulator-always-on; |
| }; |
| |
| ldo4_reg: regulator@6 { |
| regulator-always-on; |
| }; |
| }; |
| }; |
| |
| &tscadc { |
| status = "okay"; |
| adc { |
| ti,adc-channels = <4 5 6 7>; |
| }; |
| }; |
| |
| &uart0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&uart0_pins>; |
| |
| status = "okay"; |
| }; |
| |
| &usb { |
| status = "okay"; |
| }; |
| |
| &usb_ctrl_mod { |
| status = "okay"; |
| }; |
| |
| &usb0 { |
| dr_mode = "device"; |
| status = "okay"; |
| }; |
| |
| &usb0_phy { |
| status = "okay"; |
| }; |
| |
| &am33xx_pinmux { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&clkout2_pin &gpio_pin>; |
| |
| clkout2_pin: pinmux_clkout2_pin { |
| pinctrl-single,pins = < |
| 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ |
| >; |
| }; |
| |
| cpsw_default: cpsw_default { |
| pinctrl-single,pins = < |
| /* Slave 1 */ |
| 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */ |
| 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.mii1_rxerr */ |
| 0x114 (MUX_MODE1) /* mii1_txen.mii1_txen */ |
| 0x124 (MUX_MODE1) /* mii1_txd1.mii1_txd1 */ |
| 0x128 (MUX_MODE1) /* mii1_txd0.mii1_txd0 */ |
| 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.mii1_rxd1 */ |
| 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.mii1_rxd0 */ |
| 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_ref_clk.rmii1_refclk */ |
| >; |
| }; |
| |
| cpsw_sleep: cpsw_sleep { |
| pinctrl-single,pins = < |
| /* Slave 1 reset value */ |
| 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| >; |
| }; |
| |
| davinci_mdio_default: davinci_mdio_default { |
| pinctrl-single,pins = < |
| /* MDIO */ |
| 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ |
| 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ |
| >; |
| }; |
| |
| davinci_mdio_sleep: davinci_mdio_sleep { |
| pinctrl-single,pins = < |
| /* MDIO reset value */ |
| 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| >; |
| }; |
| |
| ecap0_pins: ecap_pins { |
| pinctrl-single,pins = < |
| 0x164 (MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 buzzer frequency: ecap.0 */ |
| >; |
| }; |
| |
| epwmss1_pins: epwmss_pins { |
| pinctrl-single,pins = < |
| 0x48 (PIN_INPUT | MUX_MODE7) /* gpmc_a2.gpio1_18 buzzer frequency: ehrpwm1A high-Z due to connected to ecap0 by R0469 */ |
| 0x4c (MUX_MODE6) /* gpmc_a3.ehrpwm1B buzzer volume pwm */ |
| >; |
| }; |
| |
| gpio_pin: gpio_pin { |
| pinctrl-single,pins = < |
| 0x6c (PIN_INPUT | MUX_MODE7) /* gpmc_a11.gpio1_27 PWR_FAIL_GPIO_SPARE */ |
| 0x78 (PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) /* gpmc_be1n.gpio1_28 TOUCH_CHANGE_N */ |
| 0x88 (PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) /* gpmc_csn3.gpio2_0 RUT_GPIO0_GPIO */ |
| 0x118 (PIN_INPUT | MUX_MODE7) /* gmii1_rxdv.gpio3_4 PWR_FAIL_GPIO */ |
| 0x11c (MUX_MODE7) /* mii1_txd3.gpio0_16 DEBUG_OSC_CH2_GPIO */ |
| 0x120 (MUX_MODE7) /* mii1_txd2.gpio0_17 DEBUG_OSC_CH1_GPIO */ |
| 0x134 (MUX_MODE7) /* gmii1_rxd3.gpio2_18 PHY_RSTn_GPIO */ |
| 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gmii1_rxd2.gpio2_19 PHY_INT_GPIO */ |
| 0x180 (MUX_MODE7) /* uart1_rxd.gpio0_14 WATCHDOG_TRIGGER_GPIO */ |
| 0x184 (MUX_MODE7) /* uart1_txd.gpio0_15 ALIVE_LED_N_GPIO */ |
| 0x1a0 (MUX_MODE7) /* mcasp0_aclkr.gpio3_18 MAXTOUCH_RESET_GPIO */ |
| 0x1a4 (MUX_MODE7) /* mcasp0_fsr.gpio3_19 DISPLAY_RESET_GPIO */ |
| 0x1a8 (MUX_MODE7) /* mcasp0_axr1.gpio3_20 DEBUG_RUN_MODE_GPIO */ |
| 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkx.gpio3_21 NORFLASH_WP_GPIO */ |
| 0x1b0 (PIN_OUTPUT | MUX_MODE3) /* xdma_event_intr0.clkout1 */ |
| >; |
| }; |
| |
| i2c0_pins: pinmux_i2c0_pins { |
| pinctrl-single,pins = < |
| 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ |
| 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ |
| >; |
| }; |
| |
| i2c1_pins: pinmux_i2c1_pins { |
| pinctrl-single,pins = < |
| 0x168 (PIN_INPUT | MUX_MODE3) /* uart0_ctsn.i2c1_sda */ |
| 0x16c (PIN_INPUT | MUX_MODE3) /* uart0.rtsn.i2c1_scl */ |
| >; |
| }; |
| |
| lcd_pins_s0: lcd_pins_s0 { |
| pinctrl-single,pins = < |
| 0x20 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad8.lcd_data23 */ |
| 0x24 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad9.lcd_data22 */ |
| 0x28 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad10.lcd_data21 */ |
| 0x2c (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad11.lcd_data20 */ |
| 0x30 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad12.lcd_data19 */ |
| 0x34 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad13.lcd_data18 */ |
| 0x38 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad14.lcd_data17 */ |
| 0x3c (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad15.lcd_data16 */ |
| 0xa0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */ |
| 0xa4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */ |
| 0xa8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */ |
| 0xac (PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */ |
| 0xb0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */ |
| 0xb4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */ |
| 0xb8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */ |
| 0xbc (PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */ |
| 0xc0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */ |
| 0xc4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */ |
| 0xc8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */ |
| 0xcc (PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */ |
| 0xd0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */ |
| 0xd4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */ |
| 0xd8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */ |
| 0xdc (PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */ |
| 0xe0 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_vsync.lcd_vsync */ |
| 0xe4 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_hsync.lcd_hsync */ |
| 0xe8 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_pclk.lcd_pclk */ |
| 0xec (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */ |
| >; |
| }; |
| |
| mmc1_pins: mmc1_pins { |
| pinctrl-single,pins = < |
| 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ |
| 0xf4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ |
| 0xf8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ |
| 0xfc (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ |
| 0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */ |
| 0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ |
| >; |
| }; |
| |
| nandflash_pins: pinmux_nandflash_pins { |
| pinctrl-single,pins = < |
| 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ |
| 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ |
| 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ |
| 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ |
| 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ |
| 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ |
| 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ |
| 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ |
| 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ |
| 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ |
| 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ |
| 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ |
| 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ |
| 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ |
| 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ |
| >; |
| }; |
| |
| spi0_pins: pinmux_spi0_pins { |
| pinctrl-single,pins = < |
| 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* spi0_sclk.spi0_sclk */ |
| 0x154 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */ |
| 0x158 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* spi0_d1.spi0_d1 */ |
| 0x15c (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_CS0.spi0_CS0 */ |
| >; |
| }; |
| |
| spi1_pins: pinmux_spi1_pins { |
| pinctrl-single,pins = < |
| 0x190 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_aclkx.spi1_sclk */ |
| 0x194 (PIN_INPUT_PULLUP | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */ |
| 0x198 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */ |
| 0x19c (PIN_INPUT_PULLUP | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */ |
| >; |
| }; |
| |
| uart0_pins: pinmux_uart0_pins { |
| pinctrl-single,pins = < |
| 0x170 (PIN_INPUT | MUX_MODE0) /* uart0_rxd.uart0_rxd */ |
| 0x174 (PIN_OUTPUT | MUX_MODE0) /* uart0_txd.uart0_txd */ |
| >; |
| }; |
| }; |
