| /* SPDX-License-Identifier: GPL-2.0+ */ |
| /* |
| * armboot - Startup Code for ARM926EJS CPU-core |
| * |
| * Copyright (c) 2003 Texas Instruments |
| * |
| * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------ |
| * |
| * Copyright (c) 2001 Marius Gröger <mag@sysgo.de> |
| * Copyright (c) 2002 Alex Züpke <azu@sysgo.de> |
| * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de> |
| * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com> |
| * Copyright (c) 2003 Kshitij <kshitij@ti.com> |
| * Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net> |
| */ |
| |
| #include <asm-offsets.h> |
| #include <config.h> |
| |
| /* |
| ************************************************************************* |
| * |
| * Startup Code (reset vector) |
| * |
| * do important init only if we don't start from memory! |
| * setup Memory and board specific bits prior to relocation. |
| * relocate armboot to ram |
| * setup stack |
| * |
| ************************************************************************* |
| */ |
| |
| .globl reset |
| |
| reset: |
| /* |
| * set the cpu to SVC32 mode |
| */ |
| mrs r0,cpsr |
| bic r0,r0,#0x1f |
| orr r0,r0,#0xd3 |
| msr cpsr,r0 |
| |
| /* |
| * we do sys-critical inits only at reboot, |
| * not when booting from ram! |
| */ |
| #ifndef CONFIG_SKIP_LOWLEVEL_INIT |
| bl cpu_init_crit |
| #endif |
| |
| bl _main |
| |
| /*------------------------------------------------------------------------------*/ |
| |
| .globl c_runtime_cpu_setup |
| c_runtime_cpu_setup: |
| |
| mov pc, lr |
| |
| /* |
| ************************************************************************* |
| * |
| * CPU_init_critical registers |
| * |
| * setup important registers |
| * setup memory timing |
| * |
| ************************************************************************* |
| */ |
| |
| |
| #ifndef CONFIG_SKIP_LOWLEVEL_INIT |
| cpu_init_crit: |
| /* |
| * flush v4 I/D caches |
| */ |
| mov r0, #0 |
| mcr p15, 0, r0, c7, c5, 0 /* flush v4 I-cache */ |
| mcr p15, 0, r0, c7, c6, 0 /* flush v4 D-cache */ |
| |
| /* |
| * disable MMU stuff and caches |
| */ |
| mrc p15, 0, r0, c1, c0, 0 |
| bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */ |
| bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */ |
| orr r0, r0, #0x00000002 /* set bit 1 (A) Align */ |
| orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */ |
| mcr p15, 0, r0, c1, c0, 0 |
| |
| #ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY |
| /* |
| * Go setup Memory and board specific bits prior to relocation. |
| */ |
| mov ip, lr /* perserve link reg across call */ |
| bl lowlevel_init /* go setup memory */ |
| mov lr, ip /* restore link */ |
| #endif |
| mov pc, lr /* back to my caller */ |
| #endif |
