| // SPDX-License-Identifier: GPL-2.0+ |
| /* |
| * Copyright 2018 NXP |
| */ |
| |
| /dts-v1/; |
| |
| #include "fsl-imx8mm.dtsi" |
| |
| / { |
| model = "FSL i.MX8MM DDR3L Validation board"; |
| compatible = "fsl,imx8mm-val", "fsl,imx8mm"; |
| |
| chosen { |
| bootargs = "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200"; |
| stdout-path = &uart2; |
| }; |
| |
| regulators { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| reg_usdhc2_vmmc: regulator-usdhc2 { |
| compatible = "regulator-fixed"; |
| regulator-name = "VSD_3V3"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| }; |
| }; |
| |
| busfreq { |
| status = "disabled"; |
| }; |
| }; |
| |
| &iomuxc { |
| pinctrl-names = "default"; |
| |
| imx8mm-val { |
| pinctrl_fec1: fec1grp { |
| fsl,pins = < |
| MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 |
| MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x23 |
| MX8MM_IOMUXC_ENET_TD2_ENET1_TX_CLK 0x4000001f |
| MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x56 |
| MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x56 |
| MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x56 |
| MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x56 |
| MX8MM_IOMUXC_ENET_RXC_ENET1_RX_ER 0x56 |
| MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x56 |
| MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x56 |
| >; |
| }; |
| |
| pinctrl_i2c1: i2c1grp { |
| fsl,pins = < |
| MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 |
| MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 |
| >; |
| }; |
| |
| pinctrl_i2c2: i2c2grp { |
| fsl,pins = < |
| MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 |
| MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 |
| >; |
| }; |
| |
| pinctrl_i2c3: i2c3grp { |
| fsl,pins = < |
| MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 |
| MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 |
| >; |
| }; |
| |
| pinctrl_uart2: uart2grp { |
| fsl,pins = < |
| MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 |
| MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 |
| >; |
| }; |
| |
| pinctrl_usdhc2_gpio: usdhc2grpgpio { |
| fsl,pins = < |
| MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 |
| >; |
| }; |
| |
| pinctrl_usdhc2: usdhc2grp { |
| fsl,pins = < |
| MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 |
| MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 |
| MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 |
| MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 |
| MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 |
| MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 |
| MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 |
| >; |
| }; |
| |
| pinctrl_usdhc2_100mhz: usdhc2grp100mhz { |
| fsl,pins = < |
| MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 |
| MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 |
| MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 |
| MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 |
| MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 |
| MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 |
| MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 |
| >; |
| }; |
| |
| pinctrl_usdhc2_200mhz: usdhc2grp200mhz { |
| fsl,pins = < |
| MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 |
| MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 |
| MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 |
| MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 |
| MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 |
| MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 |
| MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 |
| >; |
| }; |
| |
| pinctrl_gpmi_nand_1: gpmi-nand-1 { |
| fsl,pins = < |
| MX8MM_IOMUXC_NAND_ALE_RAWNAND_ALE 0x00000096 |
| MX8MM_IOMUXC_NAND_CE0_B_RAWNAND_CE0_B 0x00000096 |
| MX8MM_IOMUXC_NAND_CLE_RAWNAND_CLE 0x00000096 |
| MX8MM_IOMUXC_NAND_DATA00_RAWNAND_DATA00 0x00000096 |
| MX8MM_IOMUXC_NAND_DATA01_RAWNAND_DATA01 0x00000096 |
| MX8MM_IOMUXC_NAND_DATA02_RAWNAND_DATA02 0x00000096 |
| MX8MM_IOMUXC_NAND_DATA03_RAWNAND_DATA03 0x00000096 |
| MX8MM_IOMUXC_NAND_DATA04_RAWNAND_DATA04 0x00000096 |
| MX8MM_IOMUXC_NAND_DATA05_RAWNAND_DATA05 0x00000096 |
| MX8MM_IOMUXC_NAND_DATA06_RAWNAND_DATA06 0x00000096 |
| MX8MM_IOMUXC_NAND_DATA07_RAWNAND_DATA07 0x00000096 |
| MX8MM_IOMUXC_NAND_RE_B_RAWNAND_RE_B 0x00000096 |
| MX8MM_IOMUXC_NAND_READY_B_RAWNAND_READY_B 0x00000056 |
| MX8MM_IOMUXC_NAND_WE_B_RAWNAND_WE_B 0x00000096 |
| MX8MM_IOMUXC_NAND_WP_B_RAWNAND_WP_B 0x00000096 |
| >; |
| }; |
| }; |
| }; |
| |
| &i2c1 { |
| clock-frequency = <400000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c1>; |
| status = "okay"; |
| |
| pmic: bd71837@4b { |
| reg = <0x4b>; |
| compatible = "rohm,bd71837"; |
| |
| gpo { |
| rohm,drv = <0x0C>; /* 0b0000_1100 all gpos with cmos output mode */ |
| }; |
| |
| regulators { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| bd71837,pmic-buck2-uses-i2c-dvs; |
| bd71837,pmic-buck2-dvs-voltage = <1000000>, <900000>, <0>; /* VDD_ARM: Run-Idle */ |
| |
| buck1_reg: regulator@0 { |
| reg = <0>; |
| regulator-compatible = "buck1"; |
| regulator-min-microvolt = <700000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-boot-on; |
| regulator-always-on; |
| regulator-ramp-delay = <1250>; |
| }; |
| |
| buck2_reg: regulator@1 { |
| reg = <1>; |
| regulator-compatible = "buck2"; |
| regulator-min-microvolt = <700000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-boot-on; |
| regulator-always-on; |
| regulator-ramp-delay = <1250>; |
| }; |
| |
| buck3_reg: regulator@2 { |
| reg = <2>; |
| regulator-compatible = "buck3"; |
| regulator-min-microvolt = <700000>; |
| regulator-max-microvolt = <1300000>; |
| }; |
| |
| buck4_reg: regulator@3 { |
| reg = <3>; |
| regulator-compatible = "buck4"; |
| regulator-min-microvolt = <700000>; |
| regulator-max-microvolt = <1300000>; |
| }; |
| |
| buck5_reg: regulator@4 { |
| reg = <4>; |
| regulator-compatible = "buck5"; |
| regulator-min-microvolt = <700000>; |
| regulator-max-microvolt = <1350000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| buck6_reg: regulator@5 { |
| reg = <5>; |
| regulator-compatible = "buck6"; |
| regulator-min-microvolt = <3000000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| buck7_reg: regulator@6 { |
| reg = <6>; |
| regulator-compatible = "buck7"; |
| regulator-min-microvolt = <1605000>; |
| regulator-max-microvolt = <1995000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| buck8_reg: regulator@7 { |
| reg = <7>; |
| regulator-compatible = "buck8"; |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <1400000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| ldo1_reg: regulator@8 { |
| reg = <8>; |
| regulator-compatible = "ldo1"; |
| regulator-min-microvolt = <3000000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| ldo2_reg: regulator@9 { |
| reg = <9>; |
| regulator-compatible = "ldo2"; |
| regulator-min-microvolt = <900000>; |
| regulator-max-microvolt = <900000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| ldo3_reg: regulator@10 { |
| reg = <10>; |
| regulator-compatible = "ldo3"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| ldo4_reg: regulator@11 { |
| reg = <11>; |
| regulator-compatible = "ldo4"; |
| regulator-min-microvolt = <900000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| ldo5_reg: regulator@12 { |
| reg = <12>; |
| regulator-compatible = "ldo5"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| |
| ldo6_reg: regulator@13 { |
| reg = <13>; |
| regulator-compatible = "ldo6"; |
| regulator-min-microvolt = <900000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| ldo7_reg: regulator@14 { |
| reg = <14>; |
| regulator-compatible = "ldo7"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| }; |
| }; |
| }; |
| |
| &i2c2 { |
| clock-frequency = <400000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c2>; |
| status = "okay"; |
| }; |
| |
| &i2c3 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c3>; |
| status = "okay"; |
| }; |
| |
| &fec1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_fec1>; |
| phy-mode = "rmii"; |
| phy-handle = <ðphy0>; |
| fsl,magic-packet; |
| status = "okay"; |
| |
| mdio { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| ethphy0: ethernet-phy@0 { |
| compatible = "ethernet-phy-ieee802.3-c22"; |
| reg = <0>; |
| }; |
| }; |
| }; |
| |
| &uart2 { /* console */ |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart2>; |
| status = "okay"; |
| }; |
| |
| &usbotg1 { |
| dr_mode = "host"; |
| status = "okay"; |
| }; |
| |
| &usbotg2 { |
| dr_mode = "peripheral"; |
| status = "okay"; |
| }; |
| |
| &usdhc2 { |
| pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
| pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; |
| pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; |
| pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; |
| bus-width = <4>; |
| non-removable; |
| vmmc-supply = <®_usdhc2_vmmc>; |
| status = "okay"; |
| }; |
| |
| &gpmi { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_gpmi_nand_1>; |
| status = "okay"; |
| nand-on-flash-bbt; |
| }; |
| |
| &A53_0 { |
| arm-supply = <&buck2_reg>; |
| }; |
