arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright 2018 NXP
 */

&{/imx8qm-pm} {

	u-boot,dm-spl;
};

&mu {
	u-boot,dm-spl;
};

&clk {
	u-boot,dm-spl;
};

&iomuxc {
	u-boot,dm-spl;
};

&{/regulators} {
	u-boot,dm-spl;
};

&reg_usdhc2_vmmc {
	u-boot,dm-spl;
};

&{/mu@5d1c0000/iomuxc/imx8qm-mek} {
	u-boot,dm-spl;
};

&pinctrl_usdhc2_gpio {
	u-boot,dm-spl;
};

&pinctrl_usdhc2 {
	u-boot,dm-spl;
};

&pinctrl_usdhc2_100mhz {
	u-boot,dm-spl;
};

&pinctrl_usdhc2_200mhz {
	u-boot,dm-spl;
};

&pinctrl_lpuart0 {
	u-boot,dm-spl;
};

&pinctrl_usdhc1 {
	u-boot,dm-spl;
};

&pinctrl_usdhc1_100mhz {
	u-boot,dm-spl;
};

&pinctrl_usdhc1_200mhz {
	u-boot,dm-spl;
};

&pinctrl_flexspi0 {
	u-boot,dm-spl;
};

&pd_lsio {
	u-boot,dm-spl;
};

&pd_lsio_gpio1 {
	u-boot,dm-spl;
};

&pd_lsio_gpio2 {
	u-boot,dm-spl;
};

&pd_lsio_gpio4 {
	u-boot,dm-spl;
};

&pd_lsio_gpio5 {
	u-boot,dm-spl;
};

&pd_lsio_flexspi0 {
	u-boot,dm-spl;
};

&pd_conn {
	u-boot,dm-spl;
};

&pd_conn_sdch0 {
	u-boot,dm-spl;
};

&pd_conn_sdch1 {
	u-boot,dm-spl;
};

&pd_conn_sdch2 {
	u-boot,dm-spl;
};

&gpio1 {
	u-boot,dm-spl;
};

&gpio2 {
	u-boot,dm-spl;
};

&gpio4 {
	u-boot,dm-spl;
};

&gpio5 {
	u-boot,dm-spl;
};

&lpuart0 {
	u-boot,dm-spl;
};

&usdhc1 {
	u-boot,dm-spl;
};

&usdhc2 {
	u-boot,dm-spl;
};

&flexspi0 {
	u-boot,dm-spl;
};

&flash0 {
	u-boot,dm-spl;
};