Enable i2c2 and i2c3 in u-boot.
Change-Id: I984e2e76e7c8929cc62088b6838c81f5dc838568
diff --git a/arch/arm/dts/fsl-imx8mq-evk.dts b/arch/arm/dts/fsl-imx8mq-evk.dts
index f2c63349..693cb66 100644
--- a/arch/arm/dts/fsl-imx8mq-evk.dts
+++ b/arch/arm/dts/fsl-imx8mq-evk.dts
@@ -83,6 +83,13 @@
>;
};
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000007f
+ MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x4000007f
+ >;
+ };
+
pinctrl_i2c1_gpio: i2c1grp-gpio {
fsl,pins = <
MX8MQ_IOMUXC_I2C1_SCL_GPIO5_IO14 0x7f
@@ -368,7 +375,14 @@
pinctrl-1 = <&pinctrl_i2c2_gpio>;
scl-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
- status = "disabled";
+ status = "okay";
+};
+
+&i2c3 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
};
&pwm2 {
diff --git a/arch/arm/dts/fsl-imx8mq-phanbell.dts b/arch/arm/dts/fsl-imx8mq-phanbell.dts
index 9b6c476..7889d09 100644
--- a/arch/arm/dts/fsl-imx8mq-phanbell.dts
+++ b/arch/arm/dts/fsl-imx8mq-phanbell.dts
@@ -179,6 +179,12 @@
>;
};
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000007f
+ MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x4000007f
+ >;
+ };
pinctrl_pcie0: pcie0grp {
fsl,pins = <
@@ -546,7 +552,14 @@
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
- status = "disabled";
+ status = "okay";
+};
+
+&i2c3 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
};
&pwm2 {
