commit 6cd8bfdbb22b1321b55e2b61776860619652ce00
author Leonid Lobachev <leonidl@google.com> Mon Dec 16 15:11:43 2019 -0800
committer Leonid Lobachev <leonidl@google.com> Mon Dec 16 23:29:13 2019 +0000
tree 42f6d149713ceb84af3b0f2a581f954058277dfc
parent 35180f77d8ec8f6ff2a1038a8706a85ec1b7e9ed

Increase MR4 poll interval.

Change-Id: Ib4e10f18cd89d90c6ec8e0572b9ad7f7f8a0b059

board/freescale/imx8mq_phanbell/ddr/ddr_init_micron_1gb.c

diff --git a/board/freescale/imx8mq_phanbell/ddr/ddr_init_micron_1gb.c b/board/freescale/imx8mq_phanbell/ddr/ddr_init_micron_1gb.c
index 4be3231..058d177 100644
--- a/board/freescale/imx8mq_phanbell/ddr/ddr_init_micron_1gb.c
+++ b/board/freescale/imx8mq_phanbell/ddr/ddr_init_micron_1gb.c
@@ -63,7 +63,7 @@
 	reg32_write(0x3d400000,0xa1080020);
 	reg32_write(0x3d400028,0x0);
 	reg32_write(0x3d400020,0x203);
-	reg32_write(0x3d400024,0x3e800);
+	reg32_write(0x3d400024,0x186a000);
 	reg32_write(0x3d400064,0x610090);
 	reg32_write(0x3d4000d0,0xc003061c);
 	reg32_write(0x3d4000d4,0x9e0000);
@@ -103,7 +103,7 @@
 	reg32_write(0x3d400214,0x7070707);
 	reg32_write(0x3d400218,0xf070707);
 	reg32_write(0x3d402020,0x1);
-	reg32_write(0x3d402024,0xd0c0);
+	reg32_write(0x3d402024,0x518b00);
 	reg32_write(0x3d402050,0x20d040);
 	reg32_write(0x3d402064,0x14001f);
 	reg32_write(0x3d4020dc,0x940009);