| /* SPDX-License-Identifier: GPL-2.0+ */ |
| /* |
| * Copyright (C) 2015 Actions Semi Co., Ltd. |
| * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
| * |
| */ |
| |
| #ifndef _DT_BINDINGS_CLOCK_S900_CMU_H_ |
| #define _DT_BINDINGS_CLOCK_S900_CMU_H_ |
| |
| /* Module Clock ID */ |
| #define CLOCK_DDRCH1 0 |
| #define CLOCK_DMAC 1 |
| #define CLOCK_DDRCH0 2 |
| #define CLOCK_BROM 3 |
| #define CLOCK_NANDC0 4 |
| #define CLOCK_SD0 5 |
| #define CLOCK_SD1 6 |
| #define CLOCK_SD2 7 |
| #define CLOCK_DE 8 |
| #define CLOCK_LVDS 9 |
| #define CLOCK_EDP 10 |
| #define CLOCK_NANDC1 11 |
| #define CLOCK_DSI 12 |
| #define CLOCK_CSI0 13 |
| #define CLOCK_BISP 14 |
| #define CLOCK_CSI1 15 |
| #define CLOCK_SD3 16 |
| #define CLOCK_I2C4 17 |
| #define CLOCK_GPIO 18 |
| #define CLOCK_DMM 19 |
| #define CLOCK_I2STX 20 |
| #define CLOCK_I2SRX 21 |
| #define CLOCK_HDMIA 22 |
| #define CLOCK_SPDIF 23 |
| #define CLOCK_PCM0 24 |
| #define CLOCK_VDE 25 |
| #define CLOCK_VCE 26 |
| #define CLOCK_HDE 27 |
| #define CLOCK_SHARESRAM 28 |
| #define CLOCK_CMU_DDR1 29 |
| #define CLOCK_GPU3D 30 |
| #define CLOCK_CMUDDR0 31 |
| #define CLOCK_SPEED 32 |
| #define CLOCK_I2C5 33 |
| #define CLOCK_THERMAL 34 |
| #define CLOCK_HDMI 35 |
| #define CLOCK_PWM4 36 |
| #define CLOCK_PWM5 37 |
| #define CLOCK_UART0 38 |
| #define CLOCK_UART1 39 |
| #define CLOCK_UART2 40 |
| #define CLOCK_IRC 41 |
| #define CLOCK_SPI0 42 |
| #define CLOCK_SPI1 43 |
| #define CLOCK_SPI2 44 |
| #define CLOCK_SPI3 45 |
| #define CLOCK_I2C0 46 |
| #define CLOCK_I2C1 47 |
| #define CLOCK_PCM1 48 |
| #define CLOCK_IMX 49 |
| #define CLOCK_UART6 50 |
| #define CLOCK_UART3 51 |
| #define CLOCK_UART4 52 |
| #define CLOCK_UART5 53 |
| #define CLOCK_ETHERNET 54 |
| #define CLOCK_PWM0 55 |
| #define CLOCK_PWM1 56 |
| #define CLOCK_PWM2 57 |
| #define CLOCK_PWM3 58 |
| #define CLOCK_TIMER 59 |
| #define CLOCK_SE 60 |
| #define CLOCK_HDCP2TX 61 |
| #define CLOCK_I2C2 62 |
| #define CLOCK_I2C3 63 |
| |
| #endif |
