| // SPDX-License-Identifier: GPL-2.0+ |
| /* |
| * Copyright (C) 2013 Freescale Semiconductor, Inc. |
| * Copyright (C) 2015 ECA Sinters |
| * |
| * Author: Fabio Estevam <fabio.estevam@freescale.com> |
| * Modified by: Boris Brezillon <boris.brezillon@free-electrons.com> |
| */ |
| |
| #include <asm/arch/clock.h> |
| #include <asm/arch/imx-regs.h> |
| #include <asm/arch/iomux.h> |
| #include <asm/arch/mx6-pins.h> |
| #include <linux/errno.h> |
| #include <asm/gpio.h> |
| #include <asm/mach-imx/iomux-v3.h> |
| #include <asm/mach-imx/boot_mode.h> |
| #include <mmc.h> |
| #include <fsl_esdhc.h> |
| #include <miiphy.h> |
| #include <netdev.h> |
| #include <asm/arch/mxc_hdmi.h> |
| #include <asm/arch/crm_regs.h> |
| #include <linux/fb.h> |
| #include <ipu_pixfmt.h> |
| #include <asm/io.h> |
| #include <asm/arch/sys_proto.h> |
| #include <micrel.h> |
| #include <asm/mach-imx/mxc_i2c.h> |
| #include <i2c.h> |
| |
| #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ |
| PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ |
| PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
| |
| static iomux_v3_cfg_t const uart2_pads[] = { |
| MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), |
| MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), |
| }; |
| |
| void seco_mx6_setup_uart_iomux(void) |
| { |
| imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); |
| } |
| |
| #define ENET_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ |
| PAD_CTL_SPEED_MED | \ |
| PAD_CTL_DSE_40ohm | \ |
| PAD_CTL_HYS) |
| |
| static iomux_v3_cfg_t const enet_pads[] = { |
| MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| }; |
| |
| void seco_mx6_setup_enet_iomux(void) |
| { |
| imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); |
| } |
| |
| int seco_mx6_rgmii_rework(struct phy_device *phydev) |
| { |
| /* control data pad skew - devaddr = 0x02, register = 0x04 */ |
| ksz9031_phy_extended_write(phydev, 0x02, |
| MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW, |
| MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000); |
| /* rx data pad skew - devaddr = 0x02, register = 0x05 */ |
| ksz9031_phy_extended_write(phydev, 0x02, |
| MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW, |
| MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000); |
| /* tx data pad skew - devaddr = 0x02, register = 0x05 */ |
| ksz9031_phy_extended_write(phydev, 0x02, |
| MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW, |
| MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000); |
| |
| /* gtx and rx clock pad skew - devaddr = 0x02, register = 0x08 */ |
| ksz9031_phy_extended_write(phydev, 0x02, |
| MII_KSZ9031_EXT_RGMII_CLOCK_SKEW, |
| MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x03FF); |
| return 0; |
| } |
| |
| #define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ |
| PAD_CTL_SPEED_LOW | \ |
| PAD_CTL_DSE_80ohm | \ |
| PAD_CTL_SRE_FAST | \ |
| PAD_CTL_HYS) |
| |
| static iomux_v3_cfg_t const usdhc3_pads[] = { |
| MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| }; |
| |
| static iomux_v3_cfg_t const usdhc4_pads[] = { |
| MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| }; |
| |
| void seco_mx6_setup_usdhc_iomux(int id) |
| { |
| switch (id) { |
| case 3: |
| imx_iomux_v3_setup_multiple_pads(usdhc3_pads, |
| ARRAY_SIZE(usdhc3_pads)); |
| break; |
| |
| case 4: |
| imx_iomux_v3_setup_multiple_pads(usdhc4_pads, |
| ARRAY_SIZE(usdhc4_pads)); |
| break; |
| |
| default: |
| printf("Warning: invalid usdhc id (%d)\n", id); |
| break; |
| } |
| } |