| /* |
| * Copyright 2018 Logic PD, Inc. |
| * Based on SabreSD, Copyright 2016 Freescale Semiconductor, Inc. |
| * |
| * This file is dual-licensed: you can use it either under the terms |
| * of the GPL or the X11 license, at your option. Note that this dual |
| * licensing only applies to this file, and not this project as a |
| * whole. |
| * |
| * a) This file is free software; you can redistribute it and/or |
| * modify it under the terms of the GNU General Public License as |
| * published by the Free Software Foundation; either version 2 of the |
| * License, or (at your option) any later version. |
| * |
| * This file is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| * |
| * Or, alternatively, |
| * |
| * b) Permission is hereby granted, free of charge, to any person |
| * obtaining a copy of this software and associated documentation |
| * files (the "Software"), to deal in the Software without |
| * restriction, including without limitation the rights to use, |
| * copy, modify, merge, publish, distribute, sublicense, and/or |
| * sell copies of the Software, and to permit persons to whom the |
| * Software is furnished to do so, subject to the following |
| * conditions: |
| * |
| * The above copyright notice and this permission notice shall be |
| * included in all copies or substantial portions of the Software. |
| * |
| * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
| * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
| * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
| * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| * OTHER DEALINGS IN THE SOFTWARE. |
| */ |
| |
| / { |
| keyboard { |
| compatible = "gpio-keys"; |
| |
| btn0 { |
| gpios = <&pcf8575 0 GPIO_ACTIVE_LOW>; |
| label = "btn0"; |
| linux,code = <KEY_WAKEUP>; |
| debounce-interval = <10>; |
| wakeup-source; |
| }; |
| |
| btn1 { |
| gpios = <&pcf8575 1 GPIO_ACTIVE_LOW>; |
| label = "btn1"; |
| linux,code = <KEY_WAKEUP>; |
| debounce-interval = <10>; |
| wakeup-source; |
| }; |
| |
| btn2 { |
| gpios = <&pcf8575 2 GPIO_ACTIVE_LOW>; |
| label = "btn2"; |
| linux,code = <KEY_WAKEUP>; |
| debounce-interval = <10>; |
| wakeup-source; |
| }; |
| btn3 { |
| gpios = <&pcf8575 3 GPIO_ACTIVE_LOW>; |
| label = "btn3"; |
| linux,code = <KEY_WAKEUP>; |
| debounce-interval = <10>; |
| wakeup-source; |
| }; |
| |
| }; |
| |
| leds { |
| compatible = "gpio-leds"; |
| |
| gen_led0 { |
| label = "led0"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_led0>; |
| gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "cpu0"; |
| }; |
| |
| gen_led1 { |
| label = "led1"; |
| gpios = <&pcf8575 8 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| gen_led2 { |
| label = "led2"; |
| gpios = <&pcf8575 9 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "heartbeat"; |
| }; |
| |
| gen_led3 { |
| label = "led3"; |
| gpios = <&pcf8575 10 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "default-on"; |
| }; |
| }; |
| |
| reg_usb_otg_vbus: regulator-otg-vbus@0 { |
| compatible = "regulator-fixed"; |
| regulator-name = "usb_otg_vbus"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| }; |
| |
| reg_usb_h1_vbus: regulator-usbh1vbus@1 { |
| compatible = "regulator-fixed"; |
| regulator-name = "usb_h1_vbus"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| }; |
| |
| reg_3v3: regulator-3v3@2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_reg_3v3>; |
| compatible = "regulator-fixed"; |
| regulator-name = "reg_3v3"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| regulator-always-on; |
| }; |
| |
| reg_enet: regulator-ethernet@3 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_enet_pwr>; |
| compatible = "regulator-fixed"; |
| regulator-name = "ethernet-supply"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>; |
| startup-delay-us = <70000>; |
| enable-active-high; |
| vin-supply = <&sw4_reg>; |
| }; |
| |
| reg_audio: regulator-audio@4 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_reg_audio>; |
| compatible = "regulator-fixed"; |
| regulator-name = "3v3_aud"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| regulator-always-on; |
| vin-supply = <®_3v3>; |
| }; |
| |
| reg_hdmi: regulator-hdmi@5 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_reg_hdmi>; |
| compatible = "regulator-fixed"; |
| regulator-name = "hdmi-supply"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| vin-supply = <®_3v3>; |
| }; |
| |
| reg_uart3: regulator-uart3@6 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_reg_uart3>; |
| compatible = "regulator-fixed"; |
| regulator-name = "uart3-supply"; |
| gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| regulator-always-on; |
| vin-supply = <®_3v3>; |
| }; |
| |
| reg_1v8: regulator-1v8@7 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_reg_1v8>; |
| compatible = "regulator-fixed"; |
| regulator-name = "1v8-supply"; |
| gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| regulator-always-on; |
| vin-supply = <®_3v3>; |
| }; |
| |
| reg_pcie: regulator@8 { |
| compatible = "regulator-fixed"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pcie_reg>; |
| regulator-name = "MPCIE_3V3"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| }; |
| |
| mipi_pwr: regulator@9 { |
| compatible = "regulator-fixed"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_mipi_pwr>; |
| regulator-name = "mipi_pwr_en"; |
| regulator-min-microvolt = <2800000>; |
| regulator-max-microvolt = <2800000>; |
| gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| }; |
| |
| sound { |
| compatible = "fsl,imx-audio-wm8962"; |
| model = "wm8962-audio"; |
| ssi-controller = <&ssi2>; |
| audio-codec = <&codec>; |
| audio-routing = |
| "Headphone Jack", "HPOUTL", |
| "Headphone Jack", "HPOUTR", |
| "Ext Spk", "SPKOUTL", |
| "Ext Spk", "SPKOUTR", |
| "AMIC", "MICBIAS", |
| "IN3R", "AMIC"; |
| mux-int-port = <2>; |
| mux-ext-port = <4>; |
| }; |
| }; |
| |
| &audmux { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_audmux>; |
| status = "okay"; |
| }; |
| |
| &ecspi1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_ecspi1>; |
| status = "disabled"; |
| }; |
| |
| &pwm3 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pwm3>; |
| }; |
| |
| &uart3 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart3>; |
| status = "okay"; |
| }; |
| |
| &usbh1 { |
| vbus-supply = <®_usb_h1_vbus>; |
| status = "okay"; |
| }; |
| |
| &usbotg { |
| vbus-supply = <®_usb_otg_vbus>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usbotg>; |
| disable-over-current; |
| status = "okay"; |
| }; |
| |
| &fec { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_enet>; |
| phy-mode = "rgmii"; |
| phy-reset-duration = <10>; |
| phy-reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; |
| phy-supply = <®_enet>; |
| interrupt-parent = <&gpio1>; |
| interrupts = <25 IRQ_TYPE_EDGE_FALLING>; |
| status = "okay"; |
| }; |
| |
| &usdhc2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usdhc2>; |
| pinctrl-1 = <&pinctrl_usdhc2_100mhz>; |
| pinctrl-2 = <&pinctrl_usdhc2_200mhz>; |
| no-1-8-v; |
| keep-power-in-suspend; |
| status = "okay"; |
| }; |
| |
| &i2c1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c1>; |
| clock-frequency = <400000>; |
| status = "okay"; |
| |
| codec: wm8962@1a { |
| compatible = "wlf,wm8962"; |
| reg = <0x1a>; |
| clocks = <&clks IMX6QDL_CLK_CKO>; |
| clock-names = "xclk"; |
| DCVDD-supply = <®_audio>; |
| DBVDD-supply = <®_audio>; |
| AVDD-supply = <®_audio>; |
| CPVDD-supply = <®_audio>; |
| MICVDD-supply = <®_audio>; |
| PLLVDD-supply = <®_audio>; |
| SPKVDD1-supply = <®_audio>; |
| SPKVDD2-supply = <®_audio>; |
| gpio-cfg = < |
| 0x0000 /* 0:Default */ |
| 0x0000 /* 1:Default */ |
| 0x0013 /* 2:FN_DMICCLK */ |
| 0x0000 /* 3:Default */ |
| 0x8014 /* 4:FN_DMICCDAT */ |
| 0x0000 /* 5:Default */ |
| >; |
| }; |
| }; |
| |
| &i2c3 { |
| ov5640: camera@10 { |
| compatible = "ovti,ov5640"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_ov5640>; |
| reg = <0x10>; |
| clocks = <&clks IMX6QDL_CLK_CKO>; |
| clock-names = "xclk"; |
| DOVDD-supply = <&mipi_pwr>; |
| AVDD-supply = <&mipi_pwr>; |
| DVDD-supply = <&mipi_pwr>; |
| reset-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>; |
| powerdown-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>; |
| |
| port { |
| ov5640_to_mipi_csi2: endpoint { |
| remote-endpoint = <&mipi_csi2_in>; |
| clock-lanes = <0>; |
| data-lanes = <1 2>; |
| }; |
| }; |
| }; |
| |
| pcf8575: gpio@20 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pcf8574>; |
| compatible = "nxp,pcf8575"; |
| reg = <0x20>; |
| interrupt-parent = <&gpio6>; |
| interrupts = <31 IRQ_TYPE_EDGE_FALLING>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| lines-initial-states = <0x0710>; |
| wakeup-source; |
| }; |
| }; |
| |
| &mipi_csi { |
| status = "okay"; |
| |
| port@0 { |
| reg = <0>; |
| |
| mipi_csi2_in: endpoint { |
| remote-endpoint = <&ov5640_to_mipi_csi2>; |
| clock-lanes = <0>; |
| data-lanes = <1 2>; |
| }; |
| }; |
| }; |
| |
| &pcie { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pcie>; |
| reset-gpio = <&gpio1 9 GPIO_ACTIVE_LOW>; |
| status = "okay"; |
| vpcie-supply = <®_pcie>; |
| /* fsl,max-link-speed = <2>; */ |
| }; |
| |
| &ssi2 { |
| status = "okay"; |
| }; |
| |
| &iomuxc { |
| |
| pinctrl_audmux: audmuxgrp { |
| fsl,pins = < |
| MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0 |
| MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0 |
| MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0 |
| MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0 |
| >; |
| }; |
| |
| pinctrl_i2c1: i2c1 { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 |
| MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 |
| >; |
| }; |
| |
| pinctrl_enet_pwr: enet_pwr { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_mipi_pwr: pwr_mipi { |
| fsl,pins = <MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b1>; |
| }; |
| |
| pinctrl_ov5640: ov5640grp { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b1 |
| MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_reg_hdmi: reg_hdmi { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_uart3: uart3grp { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 |
| MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 |
| MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 |
| MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_usbotg: usbotggrp { |
| fsl,pins = < |
| MX6QDL_PAD_GPIO_1__USB_OTG_ID 0xd17059 |
| MX6QDL_PAD_KEY_ROW4__USB_OTG_PWR 0x130b0 |
| >; |
| }; |
| |
| pinctrl_ecspi1: ecspi1grp { |
| fsl,pins = < |
| MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1 |
| MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1 |
| MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1 |
| MX6QDL_PAD_KEY_ROW1__ECSPI1_SS0 0x100b1 |
| >; |
| }; |
| |
| pinctrl_usdhc2: usdhc2grp { |
| fsl,pins = < |
| MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* CD */ |
| MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17069 |
| MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10069 |
| MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17069 |
| MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17069 |
| MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17069 |
| MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17069 |
| >; |
| }; |
| |
| pinctrl_usdhc2_100mhz: h100-usdhc2-100mhz { |
| fsl,pins = < |
| MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* CD */ |
| MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9 |
| MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9 |
| MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9 |
| MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9 |
| MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9 |
| MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9 |
| >; |
| }; |
| |
| pinctrl_usdhc2_200mhz: h100-usdhc2-200mhz { |
| fsl,pins = < |
| MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* CD */ |
| MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9 |
| MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9 |
| MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9 |
| MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9 |
| MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9 |
| MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9 |
| >; |
| }; |
| |
| pinctrl_enet: enetgrp { |
| fsl,pins = < |
| MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0 |
| MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
| MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
| MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
| MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
| MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
| MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
| MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 |
| MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
| MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 |
| MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
| MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030 |
| MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030 |
| MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
| MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
| MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x13030 |
| MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 /* ENET_INT */ |
| MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x1b0b0 /* ETHR_nRST */ |
| >; |
| }; |
| |
| pinctrl_reg_audio: audio-reg { |
| fsl,pins = < |
| MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_pcie: pcie { |
| fsl,pins = < |
| MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0 |
| MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_pcie_reg: pciereggrp { |
| fsl,pins = < |
| MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_pcf8574: pcf8575-pins { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_lcd: lcdgrp { |
| fsl,pins = < |
| MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 /* R_LCD_DCLK */ |
| MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x100b0 /* R_LCD_PANEL_PWR */ |
| MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 /* R_LCD_HSYNC */ |
| MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 /* R_LCD_VSYNC */ |
| MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x10 /* R_LCD_MDISP */ |
| MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 |
| MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 |
| MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 |
| MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 |
| MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 |
| MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 |
| MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 |
| MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 |
| MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 |
| MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 |
| MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 |
| MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 |
| MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 |
| MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 |
| MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 |
| MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 |
| >; |
| }; |
| |
| pinctrl_pwm3: pwm3grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_reg_uart3: uart3reg { |
| fsl,pins = < |
| MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_reg_3v3: reg-3v3 { |
| fsl,pins = < |
| MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_reg_1v8: reg-1v8 { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_led0: led0 { |
| fsl,pins = < |
| MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 |
| >; |
| }; |
| }; |
