| /* |
| * Copyright (C) 2016 Amarula Solutions B.V. |
| * Copyright (C) 2016 Engicam S.r.l. |
| * Author: Jagan Teki <jagan@amarulasolutions.com> |
| * |
| * SPDX-License-Identifier: GPL-2.0+ |
| */ |
| |
| #include <common.h> |
| #include <mmc.h> |
| |
| #include <asm/io.h> |
| #include <asm/gpio.h> |
| #include <linux/sizes.h> |
| |
| #include <asm/arch/clock.h> |
| #include <asm/arch/crm_regs.h> |
| #include <asm/arch/iomux.h> |
| #include <asm/arch/mx6-pins.h> |
| #include <asm/arch/sys_proto.h> |
| #include <asm/mach-imx/iomux-v3.h> |
| |
| #include "../common/board.h" |
| |
| DECLARE_GLOBAL_DATA_PTR; |
| |
| #ifdef CONFIG_ENV_IS_IN_MMC |
| int board_mmc_get_env_dev(int devno) |
| { |
| /* dev 0 for SD/eSD, dev 1 for MMC/eMMC */ |
| return (devno == 3) ? 1 : 0; |
| } |
| #endif |
| |
| void setenv_fdt_file(void) |
| { |
| if (is_mx6dq()) |
| env_set("fdt_file", "imx6q-icore-rqs.dtb"); |
| else if(is_mx6dl() || is_mx6solo()) |
| env_set("fdt_file", "imx6dl-icore-rqs.dtb"); |
| } |
| |
| #ifdef CONFIG_SPL_BUILD |
| #include <spl.h> |
| |
| /* MMC board initialization is needed till adding DM support in SPL */ |
| #if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC) |
| #include <mmc.h> |
| #include <fsl_esdhc.h> |
| |
| #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ |
| PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH | \ |
| PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
| |
| static iomux_v3_cfg_t const usdhc3_pads[] = { |
| IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), |
| IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), |
| IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), |
| IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), |
| IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), |
| IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), |
| }; |
| |
| static iomux_v3_cfg_t const usdhc4_pads[] = { |
| IOMUX_PADS(PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), |
| IOMUX_PADS(PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), |
| IOMUX_PADS(PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), |
| IOMUX_PADS(PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), |
| IOMUX_PADS(PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), |
| IOMUX_PADS(PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), |
| IOMUX_PADS(PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), |
| IOMUX_PADS(PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), |
| IOMUX_PADS(PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), |
| IOMUX_PADS(PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), |
| }; |
| |
| struct fsl_esdhc_cfg usdhc_cfg[2] = { |
| {USDHC3_BASE_ADDR, 1, 4}, |
| {USDHC4_BASE_ADDR, 1, 8}, |
| }; |
| |
| int board_mmc_getcd(struct mmc *mmc) |
| { |
| struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; |
| int ret = 0; |
| |
| switch (cfg->esdhc_base) { |
| case USDHC3_BASE_ADDR: |
| case USDHC4_BASE_ADDR: |
| ret = 1; |
| break; |
| } |
| |
| return ret; |
| } |
| |
| int board_mmc_init(bd_t *bis) |
| { |
| int i, ret; |
| |
| /* |
| * According to the board_mmc_init() the following map is done: |
| * (U-boot device node) (Physical Port) |
| * mmc0 USDHC3 |
| * mmc1 USDHC4 |
| */ |
| for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { |
| switch (i) { |
| case 0: |
| SETUP_IOMUX_PADS(usdhc3_pads); |
| usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); |
| break; |
| case 1: |
| SETUP_IOMUX_PADS(usdhc4_pads); |
| usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); |
| break; |
| default: |
| printf("Warning - USDHC%d controller not supporting\n", |
| i + 1); |
| return 0; |
| } |
| |
| ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); |
| if (ret) { |
| printf("Warning: failed to initialize mmc dev %d\n", i); |
| return ret; |
| } |
| } |
| |
| return 0; |
| } |
| |
| #ifdef CONFIG_ENV_IS_IN_MMC |
| void board_boot_order(u32 *spl_boot_list) |
| { |
| u32 bmode = imx6_src_get_boot_mode(); |
| u8 boot_dev = BOOT_DEVICE_MMC1; |
| |
| switch ((bmode & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) { |
| case IMX6_BMODE_SD: |
| case IMX6_BMODE_ESD: |
| /* SD/eSD - BOOT_DEVICE_MMC1 */ |
| break; |
| case IMX6_BMODE_MMC: |
| case IMX6_BMODE_EMMC: |
| /* MMC/eMMC */ |
| boot_dev = BOOT_DEVICE_MMC2; |
| break; |
| default: |
| /* Default - BOOT_DEVICE_MMC1 */ |
| printf("Wrong board boot order\n"); |
| break; |
| } |
| |
| spl_boot_list[0] = boot_dev; |
| } |
| #endif |
| #endif |
| |
| #ifdef CONFIG_SPL_LOAD_FIT |
| int board_fit_config_name_match(const char *name) |
| { |
| if (is_mx6dq() && !strcmp(name, "imx6q-icore-rqs")) |
| return 0; |
| else if ((is_mx6dl() || is_mx6solo()) && !strcmp(name, "imx6dl-icore-rqs")) |
| return 0; |
| else |
| return -1; |
| } |
| #endif |
| #endif /* CONFIG_SPL_BUILD */ |