| /* SPDX-License-Identifier: GPL-2.0 */ |
| * Freescale I2C Controller |
| * Copyright 2006 Freescale Semiconductor, Inc. |
| * Based on earlier versions by Gleb Natapov <gnatapov@mrv.com>, |
| * Xianghua Xiao <x.xiao@motorola.com>, Eran Liberty (liberty@freescale.com), |
| * Some bits are taken from linux driver writen by adrian@humboldt.co.uk. |
| typedef struct fsl_i2c_base { |
| u8 adr; /* I2C slave address */ |
| #define I2C_ADR_RES ~(I2C_ADR) |
| u8 fdr; /* I2C frequency divider register */ |
| #define IC2_FDR_RES ~(IC2_FDR) |
| u8 cr; /* I2C control redister */ |
| #define I2C_CR_BIT6 0x02 /* required for workaround A004447 */ |
| u8 sr; /* I2C status register */ |
| #define I2C_SR_BCSTM 0x08 |
| u8 dr; /* I2C data register */ |
| #define I2C_DR_RES ~(I2C_DR) |
| u8 dfsrr; /* I2C digital filter sampling rate register */ |
| #define I2C_DFSRR_SHIFT 0 |
| #define I2C_DFSRR_RES ~(I2C_DR) |
| /* Fill out the reserved block */ |
| struct fsl_i2c_base __iomem *base; /* register base */ |