| /* |
| * Copyright 2017 NXP |
| * |
| * SPDX-License-Identifier: GPL-2.0+ |
| */ |
| |
| #ifndef __IMX8M_EVK_H |
| #define __IMX8M_EVK_H |
| |
| #include <linux/sizes.h> |
| #include <asm/arch/imx-regs.h> |
| |
| #ifdef CONFIG_SECURE_BOOT |
| #define CONFIG_CSF_SIZE 0x2000 /* 8K region */ |
| #endif |
| |
| #define CONFIG_SPL_FRAMEWORK |
| #define CONFIG_SPL_TEXT_BASE 0x7E1000 |
| #define CONFIG_SPL_MAX_SIZE (124 * 1024) |
| #define CONFIG_SYS_MONITOR_LEN (512 * 1024) |
| #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR |
| #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 |
| #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
| |
| #ifdef CONFIG_SPL_BUILD |
| /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ |
| #define CONFIG_SPL_WATCHDOG_SUPPORT |
| #define CONFIG_SPL_DRIVERS_MISC_SUPPORT |
| #define CONFIG_SPL_POWER_SUPPORT |
| #define CONFIG_SPL_I2C_SUPPORT |
| #define CONFIG_SPL_BOARD_INIT |
| #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" |
| #define CONFIG_SPL_STACK 0x187FF0 |
| #define CONFIG_SPL_LIBCOMMON_SUPPORT |
| #define CONFIG_SPL_LIBGENERIC_SUPPORT |
| #define CONFIG_SPL_SERIAL_SUPPORT |
| #define CONFIG_SPL_GPIO_SUPPORT |
| #define CONFIG_SPL_MMC_SUPPORT |
| #define CONFIG_SPL_BSS_START_ADDR 0x00180000 |
| #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ |
| #define CONFIG_SYS_SPL_MALLOC_START 0x00182000 |
| #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 /* 8 KB */ |
| #define CONFIG_SYS_ICACHE_OFF |
| #define CONFIG_SYS_DCACHE_OFF |
| |
| #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ |
| |
| #undef CONFIG_DM_MMC |
| #undef CONFIG_DM_PMIC |
| #undef CONFIG_DM_PMIC_PFUZE100 |
| |
| #define CONFIG_SYS_I2C |
| #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
| #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ |
| #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
| |
| #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG |
| |
| #define CONFIG_POWER |
| #define CONFIG_POWER_I2C |
| #define CONFIG_POWER_PFUZE100 |
| #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 |
| #endif |
| |
| #define CONFIG_REMAKE_ELF |
| |
| #define CONFIG_BOARD_EARLY_INIT_F |
| #define CONFIG_BOARD_POSTCLK_INIT |
| #define CONFIG_BOARD_LATE_INIT |
| |
| /* Flat Device Tree Definitions */ |
| #define CONFIG_OF_BOARD_SETUP |
| |
| #undef CONFIG_CMD_EXPORTENV |
| #undef CONFIG_CMD_IMPORTENV |
| #undef CONFIG_CMD_IMLS |
| |
| #undef CONFIG_CMD_CRC32 |
| #undef CONFIG_BOOTM_NETBSD |
| |
| /* ENET Config */ |
| /* ENET1 */ |
| #if defined(CONFIG_CMD_NET) |
| #define CONFIG_CMD_PING |
| #define CONFIG_CMD_DHCP |
| #define CONFIG_CMD_MII |
| #define CONFIG_MII |
| #define CONFIG_ETHPRIME "FEC" |
| |
| #define CONFIG_FEC_MXC |
| #define CONFIG_FEC_XCV_TYPE RGMII |
| #define CONFIG_FEC_MXC_PHYADDR 0 |
| #define FEC_QUIRK_ENET_MAC |
| |
| #define CONFIG_PHY_GIGE |
| #define IMX_FEC_BASE 0x30BE0000 |
| |
| #define CONFIG_PHYLIB |
| #define CONFIG_PHY_ATHEROS |
| #endif |
| |
| #define CONFIG_MFG_ENV_SETTINGS \ |
| "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ |
| "rdinit=/linuxrc " \ |
| "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ |
| "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ |
| "g_mass_storage.iSerialNumber=\"\" "\ |
| "clk_ignore_unused "\ |
| "\0" \ |
| "initrd_addr=0x43800000\0" \ |
| "initrd_high=0xffffffff\0" \ |
| "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ |
| /* Initial environment variables */ |
| #define CONFIG_EXTRA_ENV_SETTINGS \ |
| CONFIG_MFG_ENV_SETTINGS \ |
| "script=boot.scr\0" \ |
| "image=Image\0" \ |
| "console=ttymxc0,115200 earlycon=ec_imx6q,0x30860000,115200\0" \ |
| "fdt_addr=0x43000000\0" \ |
| "fdt_high=0xffffffffffffffff\0" \ |
| "boot_fdt=try\0" \ |
| "fdt_file=fsl-imx8mq-evk.dtb\0" \ |
| "initrd_addr=0x43800000\0" \ |
| "initrd_high=0xffffffffffffffff\0" \ |
| "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ |
| "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ |
| "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ |
| "mmcautodetect=yes\0" \ |
| "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ |
| "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ |
| "bootscript=echo Running bootscript from mmc ...; " \ |
| "source\0" \ |
| "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ |
| "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ |
| "mmcboot=echo Booting from mmc ...; " \ |
| "run mmcargs; " \ |
| "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
| "if run loadfdt; then " \ |
| "booti ${loadaddr} - ${fdt_addr}; " \ |
| "else " \ |
| "echo WARN: Cannot load the DT; " \ |
| "fi; " \ |
| "else " \ |
| "echo wait for boot; " \ |
| "fi;\0" \ |
| "netargs=setenv bootargs console=${console} " \ |
| "root=/dev/nfs " \ |
| "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ |
| "netboot=echo Booting from net ...; " \ |
| "run netargs; " \ |
| "if test ${ip_dyn} = yes; then " \ |
| "setenv get_cmd dhcp; " \ |
| "else " \ |
| "setenv get_cmd tftp; " \ |
| "fi; " \ |
| "${get_cmd} ${loadaddr} ${image}; " \ |
| "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
| "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ |
| "booti ${loadaddr} - ${fdt_addr}; " \ |
| "else " \ |
| "echo WARN: Cannot load the DT; " \ |
| "fi; " \ |
| "else " \ |
| "booti; " \ |
| "fi;\0" |
| |
| #define CONFIG_BOOTCOMMAND \ |
| "mmc dev ${mmcdev}; if mmc rescan; then " \ |
| "if run loadbootscript; then " \ |
| "run bootscript; " \ |
| "else " \ |
| "if run loadimage; then " \ |
| "run mmcboot; " \ |
| "else run netboot; " \ |
| "fi; " \ |
| "fi; " \ |
| "else booti ${loadaddr} - ${fdt_addr}; fi" |
| |
| /* Link Definitions */ |
| #define CONFIG_LOADADDR 0x40480000 |
| #define CONFIG_SYS_TEXT_BASE 0x40200000 |
| |
| #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
| |
| #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 |
| #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 |
| #define CONFIG_SYS_INIT_SP_OFFSET \ |
| (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| #define CONFIG_SYS_INIT_SP_ADDR \ |
| (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| |
| #define CONFIG_ENV_OVERWRITE |
| #define CONFIG_ENV_OFFSET (64 * SZ_64K) |
| #define CONFIG_ENV_SIZE 0x1000 |
| #define CONFIG_ENV_IS_IN_MMC |
| #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ |
| #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ |
| |
| /* Size of malloc() pool */ |
| #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024) |
| |
| #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
| #define PHYS_SDRAM 0x40000000 |
| #define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */ |
| #define CONFIG_NR_DRAM_BANKS 1 |
| |
| #define CONFIG_BAUDRATE 115200 |
| |
| #define CONFIG_MXC_UART |
| #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR |
| |
| /* Monitor Command Prompt */ |
| #undef CONFIG_SYS_PROMPT |
| #define CONFIG_SYS_PROMPT "u-boot=> " |
| #define CONFIG_SYS_LONGHELP |
| #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
| #define CONFIG_AUTO_COMPLETE |
| #define CONFIG_SYS_CBSIZE 2048 |
| #define CONFIG_SYS_MAXARGS 64 |
| #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| sizeof(CONFIG_SYS_PROMPT) + 16) |
| #define CONFIG_CMDLINE_EDITING |
| |
| #define CONFIG_IMX_BOOTAUX |
| |
| #define CONFIG_CMD_MMC |
| #define CONFIG_FSL_ESDHC |
| #define CONFIG_FSL_USDHC |
| |
| #define CONFIG_SYS_FSL_USDHC_NUM 2 |
| #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
| |
| #define CONFIG_DOS_PARTITION |
| #define CONFIG_CMD_EXT2 |
| #define CONFIG_CMD_EXT4 |
| #define CONFIG_CMD_EXT4_WRITE |
| #define CONFIG_CMD_FAT |
| |
| #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ |
| #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 |
| |
| #define CONFIG_FSL_QSPI /* enable the QUADSPI driver */ |
| #ifdef CONFIG_FSL_QSPI |
| #define CONFIG_CMD_SF |
| #define CONFIG_SPI_FLASH |
| #define CONFIG_SPI_FLASH_STMICRO |
| #define CONFIG_SPI_FLASH_BAR |
| #define CONFIG_SF_DEFAULT_BUS 0 |
| #define CONFIG_SF_DEFAULT_CS 0 |
| #define CONFIG_SF_DEFAULT_SPEED 40000000 |
| #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 |
| |
| #define FSL_QSPI_FLASH_SIZE (SZ_32M) |
| #define FSL_QSPI_FLASH_NUM 1 |
| #endif |
| |
| #define CONFIG_MXC_GPIO |
| |
| #define CONFIG_MXC_OCOTP |
| #define CONFIG_CMD_FUSE |
| |
| /* I2C Configs */ |
| #define CONFIG_SYS_I2C_SPEED 100000 |
| |
| /* USB configs */ |
| #ifndef CONFIG_SPL_BUILD |
| #define CONFIG_HAS_FSL_XHCI_USB |
| |
| #ifdef CONFIG_HAS_FSL_XHCI_USB |
| #define CONFIG_USB_XHCI_IMX8M |
| #define CONFIG_USB_XHCI_DWC3 |
| #define CONFIG_USB_XHCI_HCD |
| #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
| #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 |
| #endif |
| |
| #define CONFIG_CMD_USB |
| #define CONFIG_USB_STORAGE |
| #define CONFIG_CMD_EXT2 |
| |
| #define CONFIG_USB_DWC3 |
| #define CONFIG_USB_DWC3_GADGET |
| #define CONFIG_USBD_HS |
| |
| #define CONFIG_USB_GADGET |
| #define CONFIG_CMD_USB_MASS_STORAGE |
| #define CONFIG_USB_GADGET_MASS_STORAGE |
| #define CONFIG_USB_GADGET_DOWNLOAD |
| #define CONFIG_USB_GADGET_VBUS_DRAW 2 |
| #define CONFIG_USB_GADGET_DUALSPEED |
| #define CONFIG_USB_FUNCTION_MASS_STORAGE |
| |
| #define CONFIG_G_DNL_VENDOR_NUM 0x0525 |
| #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 |
| #define CONFIG_G_DNL_MANUFACTURER "FSL" |
| |
| #endif |
| |
| #define CONFIG_OF_SYSTEM_SETUP |
| |
| /* Framebuffer */ |
| #ifdef CONFIG_VIDEO |
| #define CONFIG_VIDEO_IMXDCSS |
| #define CONFIG_VIDEO_BMP_RLE8 |
| #define CONFIG_SPLASH_SCREEN |
| #define CONFIG_SPLASH_SCREEN_ALIGN |
| #define CONFIG_BMP_16BPP |
| #define CONFIG_VIDEO_LOGO |
| #define CONFIG_VIDEO_BMP_LOGO |
| #define CONFIG_IMX_VIDEO_SKIP |
| #endif |
| |
| #if defined(CONFIG_ANDROID_SUPPORT) |
| #include "imx8mq_evk_android.h" |
| #elif defined (CONFIG_ANDROID_THINGS_SUPPORT) |
| #include "imx8mq_evk_androidthings.h" |
| #endif |
| #endif |