blob: a83b0f43d7883460e2100245635f24b0019f52d4 [file] [log] [blame]
menu "i.MX8M DDR controllers"
depends on ARCH_IMX8M
config IMX8M_DRAM
bool "imx8m dram"
config IMX8M_LPDDR4
bool "imx8m lpddr4"
select IMX8M_DRAM
help
Select the i.MX8M LPDDR4 driver support on i.MX8M SOC.
config IMX8M_DDR4
bool "imx8m ddr4"
select IMX8M_DRAM
help
Select the i.MX8M DDR4 driver support on i.MX8M SOC.
config SAVED_DRAM_TIMING_BASE
hex "Define the base address for saved dram timing"
help
after DRAM is trained, need to save the dram related timming
info into memory for low power use. OCRAM_S is used for this
purpose on i.MX8MM.
default 0x180000
endmenu