| // SPDX-License-Identifier: GPL-2.0 |
| |
| / { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "ralink,mt7628a-soc"; |
| |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu@0 { |
| compatible = "mti,mips24KEc"; |
| device_type = "cpu"; |
| reg = <0>; |
| }; |
| }; |
| |
| resetc: reset-controller { |
| compatible = "ralink,rt2880-reset"; |
| #reset-cells = <1>; |
| }; |
| |
| cpuintc: interrupt-controller { |
| #address-cells = <0>; |
| #interrupt-cells = <1>; |
| interrupt-controller; |
| compatible = "mti,cpu-interrupt-controller"; |
| }; |
| |
| palmbus@10000000 { |
| compatible = "palmbus", "simple-bus"; |
| reg = <0x10000000 0x200000>; |
| ranges = <0x0 0x10000000 0x1FFFFF>; |
| |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| sysc: system-controller@0 { |
| compatible = "ralink,mt7620a-sysc", "syscon"; |
| reg = <0x0 0x100>; |
| }; |
| |
| syscon-reboot { |
| compatible = "syscon-reboot"; |
| regmap = <&sysc>; |
| offset = <0x34>; |
| mask = <0x1>; |
| }; |
| |
| watchdog: watchdog@100 { |
| compatible = "ralink,mt7628a-wdt", "mediatek,mt7621-wdt"; |
| reg = <0x100 0x30>; |
| |
| resets = <&resetc 8>; |
| reset-names = "wdt"; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <24>; |
| }; |
| |
| intc: interrupt-controller@200 { |
| compatible = "ralink,rt2880-intc"; |
| reg = <0x200 0x100>; |
| |
| interrupt-controller; |
| #interrupt-cells = <1>; |
| |
| resets = <&resetc 9>; |
| reset-names = "intc"; |
| |
| interrupt-parent = <&cpuintc>; |
| interrupts = <2>; |
| |
| ralink,intc-registers = <0x9c 0xa0 |
| 0x6c 0xa4 |
| 0x80 0x78>; |
| }; |
| |
| memory-controller@300 { |
| compatible = "ralink,mt7620a-memc"; |
| reg = <0x300 0x100>; |
| }; |
| |
| gpio@600 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio"; |
| reg = <0x600 0x100>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <6>; |
| |
| gpio0: bank@0 { |
| reg = <0>; |
| compatible = "mtk,mt7621-gpio-bank"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpio1: bank@1 { |
| reg = <1>; |
| compatible = "mtk,mt7621-gpio-bank"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpio2: bank@2 { |
| reg = <2>; |
| compatible = "mtk,mt7621-gpio-bank"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| }; |
| |
| spi0: spi@b00 { |
| compatible = "ralink,mt7621-spi"; |
| reg = <0xb00 0x40>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| clock-frequency = <200000000>; |
| }; |
| |
| uart0: uartlite@c00 { |
| compatible = "ns16550a"; |
| reg = <0xc00 0x100>; |
| |
| resets = <&resetc 12>; |
| reset-names = "uart0"; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <20>; |
| |
| reg-shift = <2>; |
| }; |
| |
| uart1: uart1@d00 { |
| compatible = "ns16550a"; |
| reg = <0xd00 0x100>; |
| |
| resets = <&resetc 19>; |
| reset-names = "uart1"; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <21>; |
| |
| reg-shift = <2>; |
| }; |
| |
| uart2: uart2@e00 { |
| compatible = "ns16550a"; |
| reg = <0xe00 0x100>; |
| |
| resets = <&resetc 20>; |
| reset-names = "uart2"; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <22>; |
| |
| reg-shift = <2>; |
| }; |
| }; |
| |
| eth@10110000 { |
| compatible = "mediatek,mt7628-eth"; |
| reg = <0x10100000 0x10000 |
| 0x10110000 0x8000>; |
| |
| syscon = <&sysc>; |
| }; |
| |
| usb_phy: usb-phy@10120000 { |
| compatible = "mediatek,mt7628-usbphy"; |
| reg = <0x10120000 0x1000>; |
| |
| #phy-cells = <0>; |
| |
| ralink,sysctl = <&sysc>; |
| resets = <&resetc 22 &resetc 25>; |
| reset-names = "host", "device"; |
| }; |
| |
| ehci@101c0000 { |
| compatible = "generic-ehci"; |
| reg = <0x101c0000 0x1000>; |
| |
| phys = <&usb_phy>; |
| phy-names = "usb"; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <18>; |
| }; |
| }; |