| /* SPDX-License-Identifier: GPL-2.0+ */ |
| /* |
| * Configuration header file for K3 J721E EVM |
| * |
| * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/ |
| * Lokesh Vutla <lokeshvutla@ti.com> |
| */ |
| |
| #ifndef __CONFIG_J721E_EVM_H |
| #define __CONFIG_J721E_EVM_H |
| |
| #include <linux/sizes.h> |
| #include <config_distro_bootcmd.h> |
| #include <environment/ti/mmc.h> |
| |
| #define CONFIG_ENV_SIZE (128 << 10) |
| |
| /* DDR Configuration */ |
| #define CONFIG_SYS_SDRAM_BASE1 0x880000000 |
| |
| /* SPL Loader Configuration */ |
| #ifdef CONFIG_TARGET_J721E_A72_EVM |
| #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + \ |
| CONFIG_SYS_K3_NON_SECURE_MSRAM_SIZE) |
| #else |
| /* |
| * Maximum size in memory allocated to the SPL BSS. Keep it as tight as |
| * possible (to allow the build to go through), as this directly affects |
| * our memory footprint. The less we use for BSS the more we have available |
| * for everything else. |
| */ |
| #define CONFIG_SPL_BSS_MAX_SIZE 0xA000 |
| /* |
| * Link BSS to be within SPL in a dedicated region located near the top of |
| * the MCU SRAM, this way making it available also before relocation. Note |
| * that we are not using the actual top of the MCU SRAM as there is a memory |
| * location filled in by the boot ROM that we want to read out without any |
| * interference from the C context. |
| */ |
| #define CONFIG_SPL_BSS_START_ADDR (CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX -\ |
| CONFIG_SPL_BSS_MAX_SIZE) |
| /* Set the stack right below the SPL BSS section */ |
| #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_BSS_START_ADDR |
| /* Configure R5 SPL post-relocation malloc pool in DDR */ |
| #define CONFIG_SYS_SPL_MALLOC_START 0x84000000 |
| #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M |
| #endif |
| |
| #ifdef CONFIG_SYS_K3_SPL_ATF |
| #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "tispl.bin" |
| #endif |
| |
| #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE |
| |
| #define CONFIG_SYS_BOOTM_LEN SZ_64M |
| #define CONFIG_CQSPI_REF_CLK 133333333 |
| |
| /* U-Boot general configuration */ |
| #define EXTRA_ENV_J721E_BOARD_SETTINGS \ |
| "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ |
| "findfdt=setenv fdtfile ${default_device_tree}\0" \ |
| "loadaddr=0x80080000\0" \ |
| "fdtaddr=0x82000000\0" \ |
| "overlayaddr=0x83000000\0" \ |
| "name_kern=Image\0" \ |
| "console=ttyS2,115200n8\0" \ |
| "args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000\0" \ |
| "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0" |
| |
| /* U-Boot MMC-specific configuration */ |
| #define EXTRA_ENV_J721E_BOARD_SETTINGS_MMC \ |
| "boot=mmc\0" \ |
| "mmcdev=1\0" \ |
| "bootpart=1:2\0" \ |
| "bootdir=/boot\0" \ |
| "rd_spec=-\0" \ |
| "init_mmc=run args_all args_mmc\0" \ |
| "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ |
| "get_overlay_mmc=" \ |
| "fdt address ${fdtaddr};" \ |
| "fdt resize 0x100000;" \ |
| "for overlay in $name_overlays;" \ |
| "do;" \ |
| "load mmc ${bootpart} ${overlayaddr} ${bootdir}/${overlay} && " \ |
| "fdt apply ${overlayaddr};" \ |
| "done;\0" \ |
| "get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \ |
| "${bootdir}/${name_kern}\0" |
| |
| /* Incorporate settings into the U-Boot environment */ |
| #define CONFIG_EXTRA_ENV_SETTINGS \ |
| DEFAULT_MMC_TI_ARGS \ |
| EXTRA_ENV_J721E_BOARD_SETTINGS \ |
| EXTRA_ENV_J721E_BOARD_SETTINGS_MMC |
| |
| /* Now for the remaining common defines */ |
| #include <configs/ti_armv7_common.h> |
| |
| #endif /* __CONFIG_J721E_EVM_H */ |