Fork pumpkin defconfig and dts for Coral Change-Id: I7e089ab1075c4d34b15629506a79f1d078d8a815
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 70d9fd3..bfa36b3 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile
@@ -790,6 +790,7 @@ mt7623n-bananapi-bpi-r2.dtb \ mt7629-rfb.dtb \ mt8183-evb.dtb \ + mt8516-coral.dtb \ mt8516-pumpkin.dtb dtb-$(CONFIG_TARGET_GE_BX50V3) += imx6q-bx50v3.dtb
diff --git a/arch/arm/dts/mt8516-coral.dts b/arch/arm/dts/mt8516-coral.dts new file mode 100644 index 0000000..1d193d0 --- /dev/null +++ b/arch/arm/dts/mt8516-coral.dts
@@ -0,0 +1,115 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2019 BayLibre SAS. + * Author: Fabien Parent <fparent@baylibre.com> + */ + +/dts-v1/; + +#include <config.h> +#include "mt8516.dtsi" + +/ { + model = "Coral MT8516"; + + chosen { + stdout-path = &uart0; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0x40000000 0x20000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + + /* 128 KiB reserved for ARM Trusted Firmware (BL31) */ + bl31_secmon_reserved: secmon@43000000 { + no-map; + reg = <0 0x43000000 0 0x20000>; + }; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_default>; + bus-width = <4>; + max-frequency = <200000000>; + cap-mmc-highspeed; + // Disabled for now -- Enabled on pumpkin, but gives fastboot issues. + // mmc-hs200-1_8v; + cap-mmc-hw-reset; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + non-removable; + status = "okay"; +}; + +&pinctrl { + mmc0_pins_default: mmc0default { + mux { + function = "msdc"; + groups = "msdc0"; + }; + + conf-cmd-data { + pins = "MSDC0_CMD", "MSDC0_DAT0", "MSDC0_DAT1", + "MSDC0_DAT2", "MSDC0_DAT3", "MSDC0_DAT4", + "MSDC0_DAT5", "MSDC0_DAT6", "MSDC0_DAT7"; + input-enable; + bias-pull-up; + }; + + conf-clk { + pins = "MSDC0_CLK"; + bias-pull-down; + }; + + conf-rst { + pins = "MSDC0_RSTB"; + bias-pull-up; + }; + }; + + uart0_pins: uart0 { + mux { + function = "uart"; + groups = "uart0_0_rxd_txd"; + }; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&usb0 { + status = "okay"; +};
diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig index 54a6dc4..819a0fd 100644 --- a/arch/arm/mach-mediatek/Kconfig +++ b/arch/arm/mach-mediatek/Kconfig
@@ -47,11 +47,21 @@ Ethernet, IR TX/RX, I2C, I2S, S/PDIF, and built-in Wi-Fi / Bluetooth combo chip and several DDR3 and DDR4 options. +config TARGET_MT8516_CORAL + bool "MediaTek MT8516 SoC" + select ARM64 + help + The MediaTek MT8516 is a ARM64-based SoC with a quad-core Cortex-A35. + including UART, SPI, USB2.0 and OTG, SD and MMC cards, NAND, PWM, + Ethernet, IR TX/RX, I2C, I2S, S/PDIF, and built-in Wi-Fi / Bluetooth combo + chip and several DDR3 and DDR4 options. + endchoice source "board/mediatek/mt7623/Kconfig" source "board/mediatek/mt7629/Kconfig" source "board/mediatek/mt8183/Kconfig" source "board/mediatek/pumpkin/Kconfig" +source "board/mediatek/mt8516-coral/Kconfig" endif
diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile index e8f13a1..477e46d 100644 --- a/arch/arm/mach-mediatek/Makefile +++ b/arch/arm/mach-mediatek/Makefile
@@ -7,3 +7,4 @@ obj-$(CONFIG_TARGET_MT7629) += mt7629/ obj-$(CONFIG_TARGET_MT8183) += mt8183/ obj-$(CONFIG_TARGET_MT8516) += mt8516/ +obj-$(CONFIG_TARGET_MT8516_CORAL) += mt8516/
diff --git a/board/mediatek/mt8516-coral/Kconfig b/board/mediatek/mt8516-coral/Kconfig new file mode 100644 index 0000000..269d7d7 --- /dev/null +++ b/board/mediatek/mt8516-coral/Kconfig
@@ -0,0 +1,22 @@ +if TARGET_MT8516_CORAL + +config SYS_BOARD + default "mt8516-coral" + +config SYS_CONFIG_NAME + default "mt8516-coral" + +config MTK_BROM_HEADER_INFO + string + default "media=emmc" + +config MTK_ANDROID + bool "Enable Android support" + select OF_LIBFDT + select OF_LIBFDT_OVERLAY + select LIBAVB + select AVB_VERIFY + select CMD_AVB + select CMD_DTIMG + +endif
diff --git a/board/mediatek/mt8516-coral/Makefile b/board/mediatek/mt8516-coral/Makefile new file mode 100644 index 0000000..d778122 --- /dev/null +++ b/board/mediatek/mt8516-coral/Makefile
@@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0 + +obj-y += mt8516-coral.o
diff --git a/board/mediatek/mt8516-coral/mt8516-coral.c b/board/mediatek/mt8516-coral/mt8516-coral.c new file mode 100644 index 0000000..85b2c4d --- /dev/null +++ b/board/mediatek/mt8516-coral/mt8516-coral.c
@@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2019 BayLibre SAS + */ + +#include <common.h> +#include <dm.h> + +int board_init(void) +{ + struct udevice *dev; + + uclass_first_device_err(UCLASS_USB_GADGET_GENERIC, &dev); + +#ifdef CONFIG_USB_ETHER + usb_ether_init(); +#endif + + return 0; +}
diff --git a/configs/mt8516_coral_defconfig b/configs/mt8516_coral_defconfig new file mode 100644 index 0000000..26875c2 --- /dev/null +++ b/configs/mt8516_coral_defconfig
@@ -0,0 +1,88 @@ +CONFIG_ARM=y +CONFIG_POSITION_INDEPENDENT=y +CONFIG_ARCH_MEDIATEK=y +CONFIG_SYS_TEXT_BASE=0x4C000000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_TARGET_MT8516_CORAL=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEBUG_UART_BASE=0x11005000 +CONFIG_DEBUG_UART_CLOCK=26000000 +# CONFIG_PSCI_RESET is not set +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_DEFAULT_FDT_FILE="mt8516-coral" +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTI is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_GO is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_CRC32 is not set +# CONFIG_CMD_MEMORY is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +# CONFIG_RANDOM_UUID is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_BLOCK_CACHE is not set +# CONFIG_CMD_MISC is not set +CONFIG_DEFAULT_DEVICE_TREE="mt8516-coral" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +# CONFIG_NET is not set +CONFIG_CLK=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x4d000000 +CONFIG_FASTBOOT_BUF_SIZE=0x4000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_DM_GPIO=y +# CONFIG_INPUT is not set +CONFIG_DM_MMC=y +# CONFIG_MMC_QUIRKS is not set +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_MMC_MTK=y +CONFIG_DM_ETH=y +CONFIG_PINCTRL=y +CONFIG_PINCONF=y +CONFIG_PINCTRL_MT8516=y +CONFIG_RAM=y +CONFIG_BAUDRATE=921600 +CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART_MTK=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_MTK_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_MUSB_GADGET=y +CONFIG_USB_MUSB_MTK=y +CONFIG_USB_MUSB_PIO_ONLY=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x0e8d +CONFIG_USB_GADGET_PRODUCT_NUM=0x201c +CONFIG_USB_ETHER=y +CONFIG_WDT=y +CONFIG_WDT_MTK=y +# CONFIG_REGEX is not set +CONFIG_OF_LIBFDT_OVERLAY=y +# CONFIG_EFI_LOADER is not set +CONFIG_CMD_BOOTD=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_SETEXPR=y +CONFIG_CMD_SOURCE=y
diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile index 5a590d7..ed4e11b 100644 --- a/drivers/clk/mediatek/Makefile +++ b/drivers/clk/mediatek/Makefile
@@ -6,4 +6,5 @@ obj-$(CONFIG_TARGET_MT7623) += clk-mt7623.o obj-$(CONFIG_TARGET_MT7629) += clk-mt7629.o obj-$(CONFIG_TARGET_MT8516) += clk-mt8516.o +obj-$(CONFIG_TARGET_MT8516_CORAL) += clk-mt8516.o obj-$(CONFIG_TARGET_MT8183) += clk-mt8183.o
diff --git a/include/configs/mt8516-coral.h b/include/configs/mt8516-coral.h new file mode 100644 index 0000000..5af355c --- /dev/null +++ b/include/configs/mt8516-coral.h
@@ -0,0 +1,102 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration for Coral board + * + * Copyright (C) 2019 BayLibre, SAS + * Copyright (C) 2020 Google, LLC + * Author: Fabien Parent <fparent@baylibre.com + */ + +#ifndef __MT8516_CORAL_H +#define __MT8516_CORAL_H + +#include <linux/sizes.h> +#include <linux/stringify.h> + +#ifdef CONFIG_MTK_ANDROID +// Android needs a bigger environment for libavb usage +#define CONFIG_ENV_SIZE SZ_256K +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MALLOC_LEN SZ_64M +#define CONFIG_SYS_CBSIZE SZ_64K +#else +#define CONFIG_ENV_SIZE SZ_4K +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MALLOC_LEN SZ_4M +#endif /* CONFIG_MTK_ANDROID */ + +#define CONFIG_CPU_ARMV8 +#define COUNTER_FREQUENCY 13000000 + +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE -4 +#define CONFIG_SYS_NS16550_MEM32 +#define CONFIG_SYS_NS16550_COM1 0x11005000 +#define CONFIG_SYS_NS16550_CLK 26000000 + +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \ + GENERATED_GBL_DATA_SIZE) + +#define CONFIG_SYS_BOOTM_LEN SZ_64M + +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 2 +#define CONFIG_ENV_OFFSET 0 + +#ifdef CONFIG_MTK_ANDROID +#define MMCBOOT \ + "mmcdev=0\0" \ + "dtb_index=0\0" \ + "dtbo_index=1\0" \ + "loadaddr=0x50000000\0" \ + "load_dtb=" \ + "part start mmc ${mmcdev} dtbo dtbo_part_start;" \ + "part size mmc ${mmcdev} dtbo dtbo_part_size;" \ + "mmc read ${loadaddr} ${dtbo_part_start} ${dtbo_part_size};" \ + "dtimg select ${loadaddr} ${dtb_index};" \ + "dtimg merge ${loadaddr} ${dtbo_index}; \0" \ + "load_bootimg=" \ + "part start mmc ${mmcdev} boot boot_part_start;" \ + "part size mmc ${mmcdev} boot boot_part_size;" \ + "mmc read ${loadaddr} ${boot_part_start} ${boot_part_size}; \0" \ + "mmcboot=" \ + "avb init ${mmcdev};" \ + "avb verify;" \ + "setenv bootargs \"${bootargs} ${avb_bootargs}\";" \ + "run load_dtb;" \ + "run load_bootimg;" \ + "bootm ${loadaddr}; \0" +#else +#define MMCBOOT \ + "mmcdev=0\0" \ + "rootfs_partition=3\0" \ + "mmcboot=" \ + "mmc dev ${mmcdev};" \ + "setenv bootargs ${bootargs} root=/dev/mmcblk${mmcdev}p${rootfs_partition} rootwait; " \ + "ext2load mmc ${mmcdev}:2 " __stringify(CONFIG_SYS_TEXT_BASE) " boot.scr;" \ + "source;" +#endif /* CONFIG_MTK_ANDROID */ + +#define TFTPBOOT \ + "tftpboot=" \ + "set ipaddr 192.168.0.100;" \ + "tftpboot ${kerneladdr} 192.168.0.1:fitImage;" \ + "bootm ${kerneladdr};\0" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kerneladdr=0x4A000000\0" \ + "fastboot=fastboot usb 0\0" \ + "force_fastboot=0\0" \ + MMCBOOT \ + TFTPBOOT \ + "bootcmd=" \ + "gpio input 42;" \ + "if test $? -eq 0 || test \"${force_fastboot}\" -eq 1; then " \ + "setenv force_fastboot 0; saveenv;" \ + "run fastboot;" \ + "run mmcboot;" \ + "else " \ + "run mmcboot;" \ + "fi\0" +#endif