mediatek: mt8173: refactor RTC and PMIC drivers
Refactor RTC and PMIC drivers.
Signed-off-by: kenny liang <kenny.liang@mediatek.com>
Change-Id: I74fca536cd61e00c962f080f1ba3759287682ecf
diff --git a/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.c b/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.c
deleted file mode 100644
index 8120d99..0000000
--- a/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.c
+++ /dev/null
@@ -1,165 +0,0 @@
-/*
- * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <common/debug.h>
-#include <drivers/delay_timer.h>
-#include <lib/mmio.h>
-
-#include <mt8173_def.h>
-#include <pmic_wrap_init.h>
-
-/* pmic wrap module wait_idle and read polling interval (in microseconds) */
-enum {
- WAIT_IDLE_POLLING_DELAY_US = 1,
- READ_POLLING_DELAY_US = 2
-};
-
-static inline uint32_t wait_for_state_idle(uint32_t timeout_us,
- void *wacs_register,
- void *wacs_vldclr_register,
- uint32_t *read_reg)
-{
- uint32_t reg_rdata;
- uint32_t retry;
-
- retry = (timeout_us + WAIT_IDLE_POLLING_DELAY_US) /
- WAIT_IDLE_POLLING_DELAY_US;
-
- do {
- udelay(WAIT_IDLE_POLLING_DELAY_US);
- reg_rdata = mmio_read_32((uintptr_t)wacs_register);
- /* if last read command timeout,clear vldclr bit
- read command state machine:FSM_REQ-->wfdle-->WFVLDCLR;
- write:FSM_REQ-->idle */
- switch (((reg_rdata >> RDATA_WACS_FSM_SHIFT) &
- RDATA_WACS_FSM_MASK)) {
- case WACS_FSM_WFVLDCLR:
- mmio_write_32((uintptr_t)wacs_vldclr_register, 1);
- ERROR("WACS_FSM = PMIC_WRAP_WACS_VLDCLR\n");
- break;
- case WACS_FSM_WFDLE:
- ERROR("WACS_FSM = WACS_FSM_WFDLE\n");
- break;
- case WACS_FSM_REQ:
- ERROR("WACS_FSM = WACS_FSM_REQ\n");
- break;
- case WACS_FSM_IDLE:
- goto done;
- default:
- break;
- }
-
- retry--;
- } while (retry);
-
-done:
- if (!retry) /* timeout */
- return E_PWR_WAIT_IDLE_TIMEOUT;
-
- if (read_reg)
- *read_reg = reg_rdata;
- return 0;
-}
-
-static inline uint32_t wait_for_state_ready(uint32_t timeout_us,
- void *wacs_register,
- uint32_t *read_reg)
-{
- uint32_t reg_rdata;
- uint32_t retry;
-
- retry = (timeout_us + READ_POLLING_DELAY_US) / READ_POLLING_DELAY_US;
-
- do {
- udelay(READ_POLLING_DELAY_US);
- reg_rdata = mmio_read_32((uintptr_t)wacs_register);
-
- if (((reg_rdata >> RDATA_WACS_FSM_SHIFT) & RDATA_WACS_FSM_MASK)
- == WACS_FSM_WFVLDCLR)
- break;
-
- retry--;
- } while (retry);
-
- if (!retry) { /* timeout */
- ERROR("timeout when waiting for idle\n");
- return E_PWR_WAIT_IDLE_TIMEOUT_READ;
- }
-
- if (read_reg)
- *read_reg = reg_rdata;
- return 0;
-}
-
-static int32_t pwrap_wacs2(uint32_t write,
- uint32_t adr,
- uint32_t wdata,
- uint32_t *rdata,
- uint32_t init_check)
-{
- uint32_t reg_rdata = 0;
- uint32_t wacs_write = 0;
- uint32_t wacs_adr = 0;
- uint32_t wacs_cmd = 0;
- uint32_t return_value = 0;
-
- if (init_check) {
- reg_rdata = mmio_read_32((uintptr_t)&mt8173_pwrap->wacs2_rdata);
- /* Prevent someone to used pwrap before pwrap init */
- if (((reg_rdata >> RDATA_INIT_DONE_SHIFT) &
- RDATA_INIT_DONE_MASK) != WACS_INIT_DONE) {
- ERROR("initialization isn't finished\n");
- return E_PWR_NOT_INIT_DONE;
- }
- }
- reg_rdata = 0;
- /* Check IDLE in advance */
- return_value = wait_for_state_idle(TIMEOUT_WAIT_IDLE,
- &mt8173_pwrap->wacs2_rdata,
- &mt8173_pwrap->wacs2_vldclr,
- 0);
- if (return_value != 0) {
- ERROR("wait_for_fsm_idle fail,return_value=%d\n", return_value);
- goto FAIL;
- }
- wacs_write = write << 31;
- wacs_adr = (adr >> 1) << 16;
- wacs_cmd = wacs_write | wacs_adr | wdata;
-
- mmio_write_32((uintptr_t)&mt8173_pwrap->wacs2_cmd, wacs_cmd);
- if (write == 0) {
- if (NULL == rdata) {
- ERROR("rdata is a NULL pointer\n");
- return_value = E_PWR_INVALID_ARG;
- goto FAIL;
- }
- return_value = wait_for_state_ready(TIMEOUT_READ,
- &mt8173_pwrap->wacs2_rdata,
- ®_rdata);
- if (return_value != 0) {
- ERROR("wait_for_fsm_vldclr fail,return_value=%d\n",
- return_value);
- goto FAIL;
- }
- *rdata = ((reg_rdata >> RDATA_WACS_RDATA_SHIFT)
- & RDATA_WACS_RDATA_MASK);
- mmio_write_32((uintptr_t)&mt8173_pwrap->wacs2_vldclr, 1);
- }
-FAIL:
- return return_value;
-}
-
-/* external API for pmic_wrap user */
-
-int32_t pwrap_read(uint32_t adr, uint32_t *rdata)
-{
- return pwrap_wacs2(0, adr, 0, rdata, 1);
-}
-
-int32_t pwrap_write(uint32_t adr, uint32_t wdata)
-{
- return pwrap_wacs2(1, adr, wdata, 0, 1);
-}
diff --git a/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.h b/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.h
index 0f09771..0dffc23 100644
--- a/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.h
+++ b/plat/mediatek/mt8173/drivers/pmic/pmic_wrap_init.h
@@ -7,11 +7,13 @@
#ifndef PMIC_WRAP_INIT_H
#define PMIC_WRAP_INIT_H
+#include <platform_def.h>
+
/* external API */
int32_t pwrap_read(uint32_t adr, uint32_t *rdata);
int32_t pwrap_write(uint32_t adr, uint32_t wdata);
-static struct mt8173_pmic_wrap_regs *const mt8173_pwrap =
+static struct mt8173_pmic_wrap_regs *const mtk_pwrap =
(void *)PMIC_WRAP_BASE;
/* timeout setting */
diff --git a/plat/mediatek/mt8173/drivers/rtc/rtc.c b/plat/mediatek/mt8173/drivers/rtc/rtc.c
index 2b9033e..587886c 100644
--- a/plat/mediatek/mt8173/drivers/rtc/rtc.c
+++ b/plat/mediatek/mt8173/drivers/rtc/rtc.c
@@ -5,66 +5,11 @@
*/
#include <assert.h>
-
#include <common/debug.h>
-#include <drivers/delay_timer.h>
#include <mt8173_def.h>
-#include <pmic_wrap_init.h>
#include <rtc.h>
-/* RTC busy status polling interval and retry count */
-enum {
- RTC_WRTGR_POLLING_DELAY_MS = 10,
- RTC_WRTGR_POLLING_CNT = 100
-};
-
-static uint16_t RTC_Read(uint32_t addr)
-{
- uint32_t rdata = 0;
-
- pwrap_read((uint32_t)addr, &rdata);
- return (uint16_t)rdata;
-}
-
-static void RTC_Write(uint32_t addr, uint16_t data)
-{
- pwrap_write((uint32_t)addr, (uint32_t)data);
-}
-
-static inline int32_t rtc_busy_wait(void)
-{
- uint64_t retry = RTC_WRTGR_POLLING_CNT;
-
- do {
- mdelay(RTC_WRTGR_POLLING_DELAY_MS);
- if (!(RTC_Read(RTC_BBPU) & RTC_BBPU_CBUSY))
- return 1;
- retry--;
- } while (retry);
-
- ERROR("[RTC] rtc cbusy time out!\n");
- return 0;
-}
-
-static int32_t Write_trigger(void)
-{
- RTC_Write(RTC_WRTGR, 1);
- return rtc_busy_wait();
-}
-
-static int32_t Writeif_unlock(void)
-{
- RTC_Write(RTC_PROT, RTC_PROT_UNLOCK1);
- if (!Write_trigger())
- return 0;
- RTC_Write(RTC_PROT, RTC_PROT_UNLOCK2);
- if (!Write_trigger())
- return 0;
-
- return 1;
-}
-
void rtc_bbpu_power_down(void)
{
uint16_t bbpu;
@@ -73,7 +18,7 @@
bbpu = RTC_BBPU_KEY | RTC_BBPU_AUTO | RTC_BBPU_PWREN;
if (Writeif_unlock()) {
RTC_Write(RTC_BBPU, bbpu);
- if (!Write_trigger())
+ if (!RTC_Write_Trigger())
assert(0);
} else {
assert(0);
diff --git a/plat/mediatek/mt8173/drivers/rtc/rtc.h b/plat/mediatek/mt8173/drivers/rtc/rtc.h
index 9c4ca49..f60a4c1 100644
--- a/plat/mediatek/mt8173/drivers/rtc/rtc.h
+++ b/plat/mediatek/mt8173/drivers/rtc/rtc.h
@@ -49,6 +49,12 @@
RTC_BBPU_KEY = 0x43 << 8
};
+/* external API */
+uint16_t RTC_Read(uint32_t addr);
+void RTC_Write(uint32_t addr, uint16_t data);
+int32_t rtc_busy_wait(void);
+int32_t RTC_Write_Trigger(void);
+int32_t Writeif_unlock(void);
void rtc_bbpu_power_down(void);
#endif /* RTC_H */
diff --git a/plat/mediatek/mt8173/platform.mk b/plat/mediatek/mt8173/platform.mk
index e5eca9f..a66c49b 100644
--- a/plat/mediatek/mt8173/platform.mk
+++ b/plat/mediatek/mt8173/platform.mk
@@ -35,6 +35,8 @@
lib/cpus/aarch64/cortex_a53.S \
lib/cpus/aarch64/cortex_a57.S \
lib/cpus/aarch64/cortex_a72.S \
+ ${MTK_PLAT}/common/drivers/pmic_wrap/pmic_wrap_init.c \
+ ${MTK_PLAT}/common/drivers/rtc/rtc_common.c \
${MTK_PLAT}/common/mtk_plat_common.c \
${MTK_PLAT}/common/mtk_sip_svc.c \
${MTK_PLAT_SOC}/aarch64/plat_helpers.S \
@@ -42,7 +44,6 @@
${MTK_PLAT_SOC}/bl31_plat_setup.c \
${MTK_PLAT_SOC}/drivers/crypt/crypt.c \
${MTK_PLAT_SOC}/drivers/mtcmos/mtcmos.c \
- ${MTK_PLAT_SOC}/drivers/pmic/pmic_wrap_init.c \
${MTK_PLAT_SOC}/drivers/rtc/rtc.c \
${MTK_PLAT_SOC}/drivers/spm/spm.c \
${MTK_PLAT_SOC}/drivers/spm/spm_hotplug.c \
