Merge changes I66dc6855,I2217a1ad into integration

* changes:
  rockchip: Update BL31_BASE to 0x40000
  rockchip: Fix typo for TF content text
diff --git a/plat/rockchip/px30/include/platform_def.h b/plat/rockchip/px30/include/platform_def.h
index c101cdc..9dccab8 100644
--- a/plat/rockchip/px30/include/platform_def.h
+++ b/plat/rockchip/px30/include/platform_def.h
@@ -69,7 +69,7 @@
 /*******************************************************************************
  * Platform memory map related constants
  ******************************************************************************/
-/* TF txet, ro, rw, Size: 512KB */
+/* TF text, ro, rw, Size: 512KB */
 #define TZRAM_BASE		(0x0)
 #define TZRAM_SIZE		(0x80000)
 
@@ -79,7 +79,7 @@
 /*
  * Put BL3-1 at the top of the Trusted RAM
  */
-#define BL31_BASE		(TZRAM_BASE + 0x10000)
+#define BL31_BASE		(TZRAM_BASE + 0x40000)
 #define BL31_LIMIT		(TZRAM_BASE + TZRAM_SIZE)
 
 /*******************************************************************************
diff --git a/plat/rockchip/rk3288/include/shared/bl32_param.h b/plat/rockchip/rk3288/include/shared/bl32_param.h
index 743dad4..ffdb2f3 100644
--- a/plat/rockchip/rk3288/include/shared/bl32_param.h
+++ b/plat/rockchip/rk3288/include/shared/bl32_param.h
@@ -10,9 +10,9 @@
 /*******************************************************************************
  * Platform memory map related constants
  ******************************************************************************/
-/* TF txet, ro, rw, Size: 2MB */
+/* TF text, ro, rw, Size: 1MB */
 #define TZRAM_BASE		(0x0)
-#define TZRAM_SIZE		(0x200000)
+#define TZRAM_SIZE		(0x100000)
 
 /*******************************************************************************
  * BL32 specific defines.
@@ -20,7 +20,7 @@
 /*
  * Put BL32 at the top of the Trusted RAM
  */
-#define BL32_BASE			(TZRAM_BASE + 0x100000)
+#define BL32_BASE			(TZRAM_BASE + 0x40000)
 #define BL32_LIMIT			(TZRAM_BASE + TZRAM_SIZE)
 
 #endif /* BL32_PARAM_H */
diff --git a/plat/rockchip/rk3328/include/platform_def.h b/plat/rockchip/rk3328/include/platform_def.h
index 3104d9f..baac12d 100644
--- a/plat/rockchip/rk3328/include/platform_def.h
+++ b/plat/rockchip/rk3328/include/platform_def.h
@@ -66,7 +66,7 @@
 /*******************************************************************************
  * Platform memory map related constants
  ******************************************************************************/
-/* TF txet, ro, rw, Size: 512KB */
+/* TF text, ro, rw, Size: 512KB */
 #define TZRAM_BASE		(0x0)
 #define TZRAM_SIZE		(0x80000)
 
@@ -76,7 +76,7 @@
 /*
  * Put BL3-1 at the top of the Trusted RAM
  */
-#define BL31_BASE		(TZRAM_BASE + 0x10000)
+#define BL31_BASE		(TZRAM_BASE + 0x40000)
 #define BL31_LIMIT		(TZRAM_BASE + TZRAM_SIZE)
 
 /*******************************************************************************
diff --git a/plat/rockchip/rk3368/include/platform_def.h b/plat/rockchip/rk3368/include/platform_def.h
index 7b3cc6e..9334a83 100644
--- a/plat/rockchip/rk3368/include/platform_def.h
+++ b/plat/rockchip/rk3368/include/platform_def.h
@@ -67,7 +67,7 @@
 /*******************************************************************************
  * Platform memory map related constants
  ******************************************************************************/
-/* TF txet, ro, rw, Size: 512KB */
+/* TF text, ro, rw, Size: 512KB */
 #define TZRAM_BASE		(0x0)
 #define TZRAM_SIZE		(0x80000)
 
@@ -77,7 +77,7 @@
 /*
  * Put BL3-1 at the top of the Trusted RAM
  */
-#define BL31_BASE		(TZRAM_BASE + 0x10000)
+#define BL31_BASE		(TZRAM_BASE + 0x40000)
 #define BL31_LIMIT	(TZRAM_BASE + TZRAM_SIZE)
 
 /*******************************************************************************
diff --git a/plat/rockchip/rk3399/include/shared/bl31_param.h b/plat/rockchip/rk3399/include/shared/bl31_param.h
index e7f2226..6e7e8ba 100644
--- a/plat/rockchip/rk3399/include/shared/bl31_param.h
+++ b/plat/rockchip/rk3399/include/shared/bl31_param.h
@@ -20,7 +20,7 @@
 /*
  * Put BL31 at the top of the Trusted RAM
  */
-#define BL31_BASE		(TZRAM_BASE + 0x1000)
+#define BL31_BASE		(TZRAM_BASE + 0x40000)
 #define BL31_LIMIT		(TZRAM_BASE + TZRAM_SIZE)
 
 #endif /* BL31_PARAM_H */