Merge "Unify type of "cpu_idx" across PSCI module." into integration
diff --git a/lib/psci/psci_common.c b/lib/psci/psci_common.c
index 022c877..3bfa068 100644
--- a/lib/psci/psci_common.c
+++ b/lib/psci/psci_common.c
@@ -159,9 +159,10 @@
******************************************************************************/
unsigned int psci_is_last_on_cpu(void)
{
- int cpu_idx, my_idx = (int) plat_my_core_pos();
+ unsigned int cpu_idx, my_idx = plat_my_core_pos();
- for (cpu_idx = 0; cpu_idx < PLATFORM_CORE_COUNT; cpu_idx++) {
+ for (cpu_idx = 0; cpu_idx < (unsigned int)PLATFORM_CORE_COUNT;
+ cpu_idx++) {
if (cpu_idx == my_idx) {
assert(psci_get_aff_info_state() == AFF_STATE_ON);
continue;
@@ -206,7 +207,7 @@
{
assert(pwrlvl > PSCI_CPU_PWR_LVL);
if ((pwrlvl > PSCI_CPU_PWR_LVL) && (pwrlvl <= PLAT_MAX_PWR_LVL) &&
- (cpu_idx < PLATFORM_CORE_COUNT)) {
+ (cpu_idx < (unsigned int) PLATFORM_CORE_COUNT)) {
psci_req_local_pwr_states[pwrlvl - 1U][cpu_idx] = req_pwr_state;
}
}
@@ -237,12 +238,12 @@
* assertion is added to prevent us from accessing the CPU power level.
*****************************************************************************/
static plat_local_state_t *psci_get_req_local_pwr_states(unsigned int pwrlvl,
- int cpu_idx)
+ unsigned int cpu_idx)
{
assert(pwrlvl > PSCI_CPU_PWR_LVL);
if ((pwrlvl > PSCI_CPU_PWR_LVL) && (pwrlvl <= PLAT_MAX_PWR_LVL) &&
- (cpu_idx < PLATFORM_CORE_COUNT)) {
+ (cpu_idx < (unsigned int) PLATFORM_CORE_COUNT)) {
return &psci_req_local_pwr_states[pwrlvl - 1U][cpu_idx];
} else
return NULL;
@@ -351,7 +352,7 @@
/*******************************************************************************
* PSCI helper function to get the parent nodes corresponding to a cpu_index.
******************************************************************************/
-void psci_get_parent_pwr_domain_nodes(int cpu_idx,
+void psci_get_parent_pwr_domain_nodes(unsigned int cpu_idx,
unsigned int end_lvl,
unsigned int *node_index)
{
@@ -417,7 +418,7 @@
psci_power_state_t *state_info)
{
unsigned int lvl, parent_idx, cpu_idx = plat_my_core_pos();
- int start_idx;
+ unsigned int start_idx;
unsigned int ncpus;
plat_local_state_t target_state, *req_states;
@@ -763,7 +764,7 @@
void psci_warmboot_entrypoint(void)
{
unsigned int end_pwrlvl;
- int cpu_idx = (int) plat_my_core_pos();
+ unsigned int cpu_idx = plat_my_core_pos();
unsigned int parent_nodes[PLAT_MAX_PWR_LVL] = {0};
psci_power_state_t state_info = { {PSCI_LOCAL_STATE_RUN} };
diff --git a/lib/psci/psci_private.h b/lib/psci/psci_private.h
index bbcc5cf..b49847c 100644
--- a/lib/psci/psci_private.h
+++ b/lib/psci/psci_private.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -55,16 +55,16 @@
return get_cpu_data(psci_svc_cpu_data.aff_info_state);
}
-static inline aff_info_state_t psci_get_aff_info_state_by_idx(int idx)
+static inline aff_info_state_t psci_get_aff_info_state_by_idx(unsigned int idx)
{
- return get_cpu_data_by_index((unsigned int)idx,
+ return get_cpu_data_by_index(idx,
psci_svc_cpu_data.aff_info_state);
}
-static inline void psci_set_aff_info_state_by_idx(int idx,
+static inline void psci_set_aff_info_state_by_idx(unsigned int idx,
aff_info_state_t aff_state)
{
- set_cpu_data_by_index((unsigned int)idx,
+ set_cpu_data_by_index(idx,
psci_svc_cpu_data.aff_info_state, aff_state);
}
@@ -88,9 +88,10 @@
return get_cpu_data(psci_svc_cpu_data.local_state);
}
-static inline plat_local_state_t psci_get_cpu_local_state_by_idx(int idx)
+static inline plat_local_state_t psci_get_cpu_local_state_by_idx(
+ unsigned int idx)
{
- return get_cpu_data_by_index((unsigned int)idx,
+ return get_cpu_data_by_index(idx,
psci_svc_cpu_data.local_state);
}
@@ -113,7 +114,7 @@
* Index of the first CPU power domain node level 0 which has this node
* as its parent.
*/
- int cpu_start_idx;
+ unsigned int cpu_start_idx;
/*
* Number of CPU power domains which are siblings of the domain indexed
@@ -269,7 +270,7 @@
psci_power_state_t *target_state);
int psci_validate_entry_point(entry_point_info_t *ep,
uintptr_t entrypoint, u_register_t context_id);
-void psci_get_parent_pwr_domain_nodes(int cpu_idx,
+void psci_get_parent_pwr_domain_nodes(unsigned int cpu_idx,
unsigned int end_lvl,
unsigned int *node_index);
void psci_do_state_coordination(unsigned int end_pwrlvl,
