commit d59caa07ae7be32d0f3484916a72b675542551fc
author guo-jie.wang <guo-jie.wang@mediatek.com> Fri Dec 01 19:12:12 2017 +0800
committer Guo-Jie Wang <guo-jie.wang@mediatek.com> Tue Dec 05 16:38:48 2017 +0800
tree da7998e75ccb66ff2477126169db25a88bd8bb6f
parent ad2c9d8e33a05d2e3a55a088f63186639b2ef80c

[WCNCR00166525] misc: fix coverity issues

[Description]
Fix CID
4077565 Bad bit shift operation
4077563 Dereference after null check
4077558 Unintended sign extension
4077551 Unintentional integer overflow

Change-Id: Ie67310b18c3f0e6993c608ada4a3d3e9f0e93d43
CR-Id: WCNCR00166525
Feature: misc
Signed-off-by: guo-jie.wang <guo-jie.wang@mediatek.com>
Reviewed-on: http://gerrit.mediatek.inc:8080/1228348
CheckPatch: Check Patch <srv_checkpatch@mediatek.com>
Reviewed-by: George Kuo <george.kuo@mediatek.com>
Reviewed-by: Wayne Guo <wayne.guo@mediatek.com>
Reviewed-by: Saker Hsia <saker.hsia@mediatek.com>
Build: srv_neptune_adm <srv_neptune_adm@mediatek.com>
Reviewed-by: Sarick Jiang <sarick.jiang@mediatek.com>

nic/que_mgt.c

diff --git a/nic/que_mgt.c b/nic/que_mgt.c
index 7e63990..ba8460c 100644
--- a/nic/que_mgt.c
+++ b/nic/que_mgt.c
@@ -2422,14 +2422,14 @@
 				QUEUE_INSERT_TAIL(prReturnedQue, (P_QUE_ENTRY_T) prCurrSwRfb);
 				continue;
 			}
-		}
-		if (fgIsBMC
-			&& prBssInfoRly
-			&& (IS_BSS_AIS(prBssInfoRly) || IS_BSS_P2P(prBssInfoRly))
-			&& qmHandleRxReplay(prAdapter, prCurrSwRfb)) {
-			prCurrSwRfb->eDst = RX_PKT_DESTINATION_NULL;
-			QUEUE_INSERT_TAIL(prReturnedQue, (P_QUE_ENTRY_T) prCurrSwRfb);
-			continue;
+			if (fgIsBMC
+				&& prBssInfoRly
+				&& (IS_BSS_AIS(prBssInfoRly) || IS_BSS_P2P(prBssInfoRly))
+				&& qmHandleRxReplay(prAdapter, prCurrSwRfb)) {
+				prCurrSwRfb->eDst = RX_PKT_DESTINATION_NULL;
+				QUEUE_INSERT_TAIL(prReturnedQue, (P_QUE_ENTRY_T) prCurrSwRfb);
+				continue;
+			}
 		}
 #endif
 
@@ -5960,7 +5960,7 @@
 {
 	UINT_8 ucCount = 0;
 	UINT_64 u8Data = 0;
-	UINT_8 ucTmp = 0;
+	UINT_64 ucTmp = 0;
 
 	if (!pu8Rets) {
 		DBGLOG(QM, ERROR, "Please input valid pu8Rets\n");