Alex Deucher | aaa36a9 | 2015-04-20 17:31:14 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2014 Advanced Micro Devices, Inc. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| 21 | * |
| 22 | */ |
| 23 | |
| 24 | #ifndef SMU_UCODE_XFER_VI_H |
| 25 | #define SMU_UCODE_XFER_VI_H |
| 26 | |
| 27 | #define SMU_DRAMData_TOC_VERSION 1 |
| 28 | #define MAX_IH_REGISTER_COUNT 65535 |
| 29 | #define SMU_DIGEST_SIZE_BYTES 20 |
| 30 | #define SMU_FB_SIZE_BYTES 1048576 |
| 31 | #define SMU_MAX_ENTRIES 12 |
| 32 | |
| 33 | #define UCODE_ID_SMU 0 |
| 34 | #define UCODE_ID_SDMA0 1 |
| 35 | #define UCODE_ID_SDMA1 2 |
| 36 | #define UCODE_ID_CP_CE 3 |
| 37 | #define UCODE_ID_CP_PFP 4 |
| 38 | #define UCODE_ID_CP_ME 5 |
| 39 | #define UCODE_ID_CP_MEC 6 |
| 40 | #define UCODE_ID_CP_MEC_JT1 7 |
| 41 | #define UCODE_ID_CP_MEC_JT2 8 |
| 42 | #define UCODE_ID_GMCON_RENG 9 |
| 43 | #define UCODE_ID_RLC_G 10 |
| 44 | #define UCODE_ID_IH_REG_RESTORE 11 |
| 45 | #define UCODE_ID_VBIOS 12 |
| 46 | #define UCODE_ID_MISC_METADATA 13 |
| 47 | #define UCODE_ID_RLC_SCRATCH 32 |
| 48 | #define UCODE_ID_RLC_SRM_ARAM 33 |
| 49 | #define UCODE_ID_RLC_SRM_DRAM 34 |
| 50 | #define UCODE_ID_MEC_STORAGE 35 |
| 51 | #define UCODE_ID_VBIOS_PARAMETERS 36 |
| 52 | #define UCODE_META_DATA 0xFF |
| 53 | |
| 54 | #define UCODE_ID_SMU_MASK 0x00000001 |
| 55 | #define UCODE_ID_SDMA0_MASK 0x00000002 |
| 56 | #define UCODE_ID_SDMA1_MASK 0x00000004 |
| 57 | #define UCODE_ID_CP_CE_MASK 0x00000008 |
| 58 | #define UCODE_ID_CP_PFP_MASK 0x00000010 |
| 59 | #define UCODE_ID_CP_ME_MASK 0x00000020 |
| 60 | #define UCODE_ID_CP_MEC_MASK 0x00000040 |
| 61 | #define UCODE_ID_CP_MEC_JT1_MASK 0x00000080 |
| 62 | #define UCODE_ID_CP_MEC_JT2_MASK 0x00000100 |
| 63 | #define UCODE_ID_GMCON_RENG_MASK 0x00000200 |
| 64 | #define UCODE_ID_RLC_G_MASK 0x00000400 |
| 65 | #define UCODE_ID_IH_REG_RESTORE_MASK 0x00000800 |
| 66 | #define UCODE_ID_VBIOS_MASK 0x00001000 |
| 67 | |
| 68 | #define UCODE_FLAG_UNHALT_MASK 0x1 |
| 69 | |
| 70 | struct SMU_Entry { |
| 71 | #ifndef __BIG_ENDIAN |
| 72 | uint16_t id; |
| 73 | uint16_t version; |
| 74 | uint32_t image_addr_high; |
| 75 | uint32_t image_addr_low; |
| 76 | uint32_t meta_data_addr_high; |
| 77 | uint32_t meta_data_addr_low; |
| 78 | uint32_t data_size_byte; |
| 79 | uint16_t flags; |
| 80 | uint16_t num_register_entries; |
| 81 | #else |
| 82 | uint16_t version; |
| 83 | uint16_t id; |
| 84 | uint32_t image_addr_high; |
| 85 | uint32_t image_addr_low; |
| 86 | uint32_t meta_data_addr_high; |
| 87 | uint32_t meta_data_addr_low; |
| 88 | uint32_t data_size_byte; |
| 89 | uint16_t num_register_entries; |
| 90 | uint16_t flags; |
| 91 | #endif |
| 92 | }; |
| 93 | |
| 94 | struct SMU_DRAMData_TOC { |
| 95 | uint32_t structure_version; |
| 96 | uint32_t num_entries; |
| 97 | struct SMU_Entry entry[SMU_MAX_ENTRIES]; |
| 98 | }; |
| 99 | |
| 100 | #endif |