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Hans Verkuil1c1e45d2008-04-28 20:24:33 -03001/*
2 * cx18 init/start/stop/exit stream functions
3 *
4 * Derived from ivtv-streams.c
5 *
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
Andy Walls6afdeaf2010-05-23 18:53:35 -03007 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
Hans Verkuil1c1e45d2008-04-28 20:24:33 -03008 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22 * 02111-1307 USA
23 */
24
25#include "cx18-driver.h"
Andy Wallsb1526422008-08-30 16:03:44 -030026#include "cx18-io.h"
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030027#include "cx18-fileops.h"
28#include "cx18-mailbox.h"
29#include "cx18-i2c.h"
30#include "cx18-queue.h"
31#include "cx18-ioctl.h"
32#include "cx18-streams.h"
33#include "cx18-cards.h"
34#include "cx18-scb.h"
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030035#include "cx18-dvb.h"
36
37#define CX18_DSP0_INTERRUPT_MASK 0xd0004C
38
Hans Verkuilbec43662008-12-30 06:58:20 -030039static struct v4l2_file_operations cx18_v4l2_enc_fops = {
Hans Verkuildaf20d92008-05-12 11:21:58 -030040 .owner = THIS_MODULE,
41 .read = cx18_v4l2_read,
42 .open = cx18_v4l2_open,
Hans Verkuildcaded72012-06-09 10:54:19 -030043 .unlocked_ioctl = video_ioctl2,
Hans Verkuildaf20d92008-05-12 11:21:58 -030044 .release = cx18_v4l2_close,
45 .poll = cx18_v4l2_enc_poll,
Steven Tothb7101de2011-04-06 08:32:56 -030046 .mmap = cx18_v4l2_mmap,
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030047};
48
49/* offset from 0 to register ts v4l2 minors on */
50#define CX18_V4L2_ENC_TS_OFFSET 16
51/* offset from 0 to register pcm v4l2 minors on */
52#define CX18_V4L2_ENC_PCM_OFFSET 24
53/* offset from 0 to register yuv v4l2 minors on */
54#define CX18_V4L2_ENC_YUV_OFFSET 32
55
56static struct {
57 const char *name;
58 int vfl_type;
Hans Verkuildd896012008-10-04 08:36:54 -030059 int num_offset;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030060 int dma;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030061} cx18_stream_info[] = {
62 { /* CX18_ENC_STREAM_TYPE_MPG */
63 "encoder MPEG",
64 VFL_TYPE_GRABBER, 0,
Hans Verkuilff82b212012-09-17 05:02:38 -030065 PCI_DMA_FROMDEVICE,
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030066 },
67 { /* CX18_ENC_STREAM_TYPE_TS */
68 "TS",
69 VFL_TYPE_GRABBER, -1,
Hans Verkuilff82b212012-09-17 05:02:38 -030070 PCI_DMA_FROMDEVICE,
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030071 },
72 { /* CX18_ENC_STREAM_TYPE_YUV */
73 "encoder YUV",
74 VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
Hans Verkuilff82b212012-09-17 05:02:38 -030075 PCI_DMA_FROMDEVICE,
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030076 },
77 { /* CX18_ENC_STREAM_TYPE_VBI */
78 "encoder VBI",
79 VFL_TYPE_VBI, 0,
Hans Verkuilff82b212012-09-17 05:02:38 -030080 PCI_DMA_FROMDEVICE,
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030081 },
82 { /* CX18_ENC_STREAM_TYPE_PCM */
83 "encoder PCM audio",
84 VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
Hans Verkuilff82b212012-09-17 05:02:38 -030085 PCI_DMA_FROMDEVICE,
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030086 },
87 { /* CX18_ENC_STREAM_TYPE_IDX */
88 "encoder IDX",
89 VFL_TYPE_GRABBER, -1,
Hans Verkuilff82b212012-09-17 05:02:38 -030090 PCI_DMA_FROMDEVICE,
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030091 },
92 { /* CX18_ENC_STREAM_TYPE_RAD */
93 "encoder radio",
94 VFL_TYPE_RADIO, 0,
Hans Verkuilff82b212012-09-17 05:02:38 -030095 PCI_DMA_NONE,
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030096 },
97};
98
Simon Farnsworth1bf58422011-05-03 08:57:40 -030099
Mauro Carvalho Chehab5e6e81b2012-10-27 11:28:50 -0300100static void cx18_dma_free(struct videobuf_queue *q,
Simon Farnsworth1bf58422011-05-03 08:57:40 -0300101 struct cx18_stream *s, struct cx18_videobuf_buffer *buf)
102{
103 videobuf_waiton(q, &buf->vb, 0, 0);
104 videobuf_vmalloc_free(&buf->vb);
105 buf->vb.state = VIDEOBUF_NEEDS_INIT;
106}
107
108static int cx18_prepare_buffer(struct videobuf_queue *q,
109 struct cx18_stream *s,
110 struct cx18_videobuf_buffer *buf,
111 u32 pixelformat,
112 unsigned int width, unsigned int height,
113 enum v4l2_field field)
114{
115 struct cx18 *cx = s->cx;
116 int rc = 0;
117
118 /* check settings */
119 buf->bytes_used = 0;
120
121 if ((width < 48) || (height < 32))
122 return -EINVAL;
123
124 buf->vb.size = (width * height * 2);
125 if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
126 return -EINVAL;
127
128 /* alloc + fill struct (if changed) */
129 if (buf->vb.width != width || buf->vb.height != height ||
130 buf->vb.field != field || s->pixelformat != pixelformat ||
131 buf->tvnorm != cx->std) {
132
133 buf->vb.width = width;
134 buf->vb.height = height;
135 buf->vb.field = field;
136 buf->tvnorm = cx->std;
137 s->pixelformat = pixelformat;
138
Simon Farnsworth09fc9802011-09-05 12:23:12 -0300139 /* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
140 UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
141 if (s->pixelformat == V4L2_PIX_FMT_HM12)
142 s->vb_bytes_per_frame = height * 720 * 3 / 2;
143 else
144 s->vb_bytes_per_frame = height * 720 * 2;
Simon Farnsworth1bf58422011-05-03 08:57:40 -0300145 cx18_dma_free(q, s, buf);
146 }
147
148 if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
149 return -EINVAL;
150
151 if (buf->vb.field == 0)
152 buf->vb.field = V4L2_FIELD_INTERLACED;
153
154 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
155 buf->vb.width = width;
156 buf->vb.height = height;
157 buf->vb.field = field;
158 buf->tvnorm = cx->std;
159 s->pixelformat = pixelformat;
160
Simon Farnsworth09fc9802011-09-05 12:23:12 -0300161 /* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
162 UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
163 if (s->pixelformat == V4L2_PIX_FMT_HM12)
164 s->vb_bytes_per_frame = height * 720 * 3 / 2;
165 else
166 s->vb_bytes_per_frame = height * 720 * 2;
Simon Farnsworth1bf58422011-05-03 08:57:40 -0300167 rc = videobuf_iolock(q, &buf->vb, NULL);
168 if (rc != 0)
169 goto fail;
170 }
171 buf->vb.state = VIDEOBUF_PREPARED;
172 return 0;
173
174fail:
175 cx18_dma_free(q, s, buf);
176 return rc;
177
178}
179
180/* VB_MIN_BUFSIZE is lcm(1440 * 480, 1440 * 576)
181 1440 is a single line of 4:2:2 YUV at 720 luma samples wide
182*/
183#define VB_MIN_BUFFERS 32
184#define VB_MIN_BUFSIZE 4147200
185
186static int buffer_setup(struct videobuf_queue *q,
187 unsigned int *count, unsigned int *size)
188{
189 struct cx18_stream *s = q->priv_data;
190 struct cx18 *cx = s->cx;
191
192 *size = 2 * cx->cxhdl.width * cx->cxhdl.height;
193 if (*count == 0)
194 *count = VB_MIN_BUFFERS;
195
196 while (*size * *count > VB_MIN_BUFFERS * VB_MIN_BUFSIZE)
197 (*count)--;
198
199 q->field = V4L2_FIELD_INTERLACED;
200 q->last = V4L2_FIELD_INTERLACED;
201
202 return 0;
203}
204
205static int buffer_prepare(struct videobuf_queue *q,
206 struct videobuf_buffer *vb,
207 enum v4l2_field field)
208{
209 struct cx18_videobuf_buffer *buf =
210 container_of(vb, struct cx18_videobuf_buffer, vb);
211 struct cx18_stream *s = q->priv_data;
212 struct cx18 *cx = s->cx;
213
214 return cx18_prepare_buffer(q, s, buf, s->pixelformat,
215 cx->cxhdl.width, cx->cxhdl.height, field);
216}
217
218static void buffer_release(struct videobuf_queue *q,
219 struct videobuf_buffer *vb)
220{
221 struct cx18_videobuf_buffer *buf =
222 container_of(vb, struct cx18_videobuf_buffer, vb);
223 struct cx18_stream *s = q->priv_data;
224
225 cx18_dma_free(q, s, buf);
226}
227
228static void buffer_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
229{
230 struct cx18_videobuf_buffer *buf =
231 container_of(vb, struct cx18_videobuf_buffer, vb);
232 struct cx18_stream *s = q->priv_data;
233
234 buf->vb.state = VIDEOBUF_QUEUED;
235
236 list_add_tail(&buf->vb.queue, &s->vb_capture);
237}
238
239static struct videobuf_queue_ops cx18_videobuf_qops = {
240 .buf_setup = buffer_setup,
241 .buf_prepare = buffer_prepare,
242 .buf_queue = buffer_queue,
243 .buf_release = buffer_release,
244};
245
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300246static void cx18_stream_init(struct cx18 *cx, int type)
247{
248 struct cx18_stream *s = &cx->streams[type];
Andy Walls3d059132009-01-10 21:54:39 -0300249 struct video_device *video_dev = s->video_dev;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300250
Andy Walls3d059132009-01-10 21:54:39 -0300251 /* we need to keep video_dev, so restore it afterwards */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300252 memset(s, 0, sizeof(*s));
Andy Walls3d059132009-01-10 21:54:39 -0300253 s->video_dev = video_dev;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300254
255 /* initialize cx18_stream fields */
Andy Walls754f9962010-12-11 20:38:20 -0300256 s->dvb = NULL;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300257 s->cx = cx;
258 s->type = type;
259 s->name = cx18_stream_info[type].name;
Andy Wallsd3c5e702008-08-23 16:42:29 -0300260 s->handle = CX18_INVALID_TASK_HANDLE;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300261
262 s->dma = cx18_stream_info[type].dma;
Andy Walls6ecd86d2008-12-07 23:30:17 -0300263 s->buffers = cx->stream_buffers[type];
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300264 s->buf_size = cx->stream_buf_size[type];
Andy Walls52fcb3e2009-11-08 23:45:24 -0300265 INIT_LIST_HEAD(&s->buf_pool);
266 s->bufs_per_mdl = 1;
267 s->mdl_size = s->buf_size * s->bufs_per_mdl;
Andy Walls6ecd86d2008-12-07 23:30:17 -0300268
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300269 init_waitqueue_head(&s->waitq);
270 s->id = -1;
Andy Walls40c55202009-04-13 23:08:00 -0300271 spin_lock_init(&s->q_free.lock);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300272 cx18_queue_init(&s->q_free);
Andy Walls40c55202009-04-13 23:08:00 -0300273 spin_lock_init(&s->q_busy.lock);
Andy Walls66c2a6b2008-12-08 23:02:45 -0300274 cx18_queue_init(&s->q_busy);
Andy Walls40c55202009-04-13 23:08:00 -0300275 spin_lock_init(&s->q_full.lock);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300276 cx18_queue_init(&s->q_full);
Andy Walls52fcb3e2009-11-08 23:45:24 -0300277 spin_lock_init(&s->q_idle.lock);
278 cx18_queue_init(&s->q_idle);
Andy Walls21a278b2009-04-15 20:45:10 -0300279
280 INIT_WORK(&s->out_work_order, cx18_out_work_handler);
Steven Tothb7101de2011-04-06 08:32:56 -0300281
282 INIT_LIST_HEAD(&s->vb_capture);
283 s->vb_timeout.function = cx18_vb_timeout;
284 s->vb_timeout.data = (unsigned long)s;
285 init_timer(&s->vb_timeout);
286 spin_lock_init(&s->vb_lock);
Simon Farnsworth1bf58422011-05-03 08:57:40 -0300287 if (type == CX18_ENC_STREAM_TYPE_YUV) {
Simon Farnsworth612031c2011-05-10 10:49:50 -0300288 spin_lock_init(&s->vbuf_q_lock);
289
Simon Farnsworth1bf58422011-05-03 08:57:40 -0300290 s->vb_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
291 videobuf_queue_vmalloc_init(&s->vbuf_q, &cx18_videobuf_qops,
292 &cx->pci_dev->dev, &s->vbuf_q_lock,
293 V4L2_BUF_TYPE_VIDEO_CAPTURE,
294 V4L2_FIELD_INTERLACED,
295 sizeof(struct cx18_videobuf_buffer),
296 s, &cx->serialize_lock);
Steven Tothb7101de2011-04-06 08:32:56 -0300297
Simon Farnsworth1bf58422011-05-03 08:57:40 -0300298 /* Assume the previous pixel default */
299 s->pixelformat = V4L2_PIX_FMT_HM12;
Simon Farnsworth09fc9802011-09-05 12:23:12 -0300300 s->vb_bytes_per_frame = cx->cxhdl.height * 720 * 3 / 2;
Simon Farnsworth1bf58422011-05-03 08:57:40 -0300301 }
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300302}
303
304static int cx18_prep_dev(struct cx18 *cx, int type)
305{
306 struct cx18_stream *s = &cx->streams[type];
307 u32 cap = cx->v4l2_cap;
Hans Verkuildd896012008-10-04 08:36:54 -0300308 int num_offset = cx18_stream_info[type].num_offset;
Andy Walls5811cf92009-02-14 17:08:37 -0300309 int num = cx->instance + cx18_first_minor + num_offset;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300310
Andy Walls754f9962010-12-11 20:38:20 -0300311 /*
312 * These five fields are always initialized.
313 * For analog capture related streams, if video_dev == NULL then the
314 * stream is not in use.
315 * For the TS stream, if dvb == NULL then the stream is not in use.
316 * In those cases no other fields but these four can be used.
317 */
Andy Walls3d059132009-01-10 21:54:39 -0300318 s->video_dev = NULL;
Andy Walls754f9962010-12-11 20:38:20 -0300319 s->dvb = NULL;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300320 s->cx = cx;
321 s->type = type;
322 s->name = cx18_stream_info[type].name;
323
324 /* Check whether the radio is supported */
325 if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
326 return 0;
327
328 /* Check whether VBI is supported */
329 if (type == CX18_ENC_STREAM_TYPE_VBI &&
330 !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
331 return 0;
332
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300333 /* User explicitly selected 0 buffers for these streams, so don't
334 create them. */
335 if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
Andy Walls6ecd86d2008-12-07 23:30:17 -0300336 cx->stream_buffers[type] == 0) {
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300337 CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
338 return 0;
339 }
340
341 cx18_stream_init(cx, type);
342
Andy Walls754f9962010-12-11 20:38:20 -0300343 /* Allocate the cx18_dvb struct only for the TS on cards with DTV */
344 if (type == CX18_ENC_STREAM_TYPE_TS) {
345 if (cx->card->hw_all & CX18_HW_DVB) {
346 s->dvb = kzalloc(sizeof(struct cx18_dvb), GFP_KERNEL);
347 if (s->dvb == NULL) {
348 CX18_ERR("Couldn't allocate cx18_dvb structure"
349 " for %s\n", s->name);
350 return -ENOMEM;
351 }
352 } else {
353 /* Don't need buffers for the TS, if there is no DVB */
354 s->buffers = 0;
355 }
356 }
357
Hans Verkuildd896012008-10-04 08:36:54 -0300358 if (num_offset == -1)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300359 return 0;
360
361 /* allocate and initialize the v4l2 video device structure */
Andy Walls3d059132009-01-10 21:54:39 -0300362 s->video_dev = video_device_alloc();
363 if (s->video_dev == NULL) {
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300364 CX18_ERR("Couldn't allocate v4l2 video_device for %s\n",
365 s->name);
366 return -ENOMEM;
367 }
368
Andy Walls5811cf92009-02-14 17:08:37 -0300369 snprintf(s->video_dev->name, sizeof(s->video_dev->name), "%s %s",
370 cx->v4l2_dev.name, s->name);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300371
Andy Walls3d059132009-01-10 21:54:39 -0300372 s->video_dev->num = num;
Andy Walls5811cf92009-02-14 17:08:37 -0300373 s->video_dev->v4l2_dev = &cx->v4l2_dev;
Andy Walls3d059132009-01-10 21:54:39 -0300374 s->video_dev->fops = &cx18_v4l2_enc_fops;
375 s->video_dev->release = video_device_release;
376 s->video_dev->tvnorms = V4L2_STD_ALL;
Hans Verkuildcaded72012-06-09 10:54:19 -0300377 s->video_dev->lock = &cx->serialize_lock;
Hans Verkuilb1a873a2011-03-22 10:14:07 -0300378 set_bit(V4L2_FL_USE_FH_PRIO, &s->video_dev->flags);
Andy Walls3d059132009-01-10 21:54:39 -0300379 cx18_set_funcs(s->video_dev);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300380 return 0;
381}
382
383/* Initialize v4l2 variables and register v4l2 devices */
384int cx18_streams_setup(struct cx18 *cx)
385{
Andy Walls9b4a7c82008-10-18 10:20:25 -0300386 int type, ret;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300387
388 /* Setup V4L2 Devices */
389 for (type = 0; type < CX18_MAX_STREAMS; type++) {
390 /* Prepare device */
Andy Walls9b4a7c82008-10-18 10:20:25 -0300391 ret = cx18_prep_dev(cx, type);
392 if (ret < 0)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300393 break;
394
395 /* Allocate Stream */
Andy Walls9b4a7c82008-10-18 10:20:25 -0300396 ret = cx18_stream_alloc(&cx->streams[type]);
397 if (ret < 0)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300398 break;
399 }
400 if (type == CX18_MAX_STREAMS)
401 return 0;
402
403 /* One or more streams could not be initialized. Clean 'em all up. */
Hans Verkuil3f983872008-05-01 10:31:12 -0300404 cx18_streams_cleanup(cx, 0);
Andy Walls9b4a7c82008-10-18 10:20:25 -0300405 return ret;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300406}
407
408static int cx18_reg_dev(struct cx18 *cx, int type)
409{
410 struct cx18_stream *s = &cx->streams[type];
411 int vfl_type = cx18_stream_info[type].vfl_type;
Laurent Pinchart38c7c032009-11-27 13:57:15 -0300412 const char *name;
Andy Walls9b4a7c82008-10-18 10:20:25 -0300413 int num, ret;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300414
Andy Walls754f9962010-12-11 20:38:20 -0300415 if (type == CX18_ENC_STREAM_TYPE_TS && s->dvb != NULL) {
Andy Walls9b4a7c82008-10-18 10:20:25 -0300416 ret = cx18_dvb_register(s);
417 if (ret < 0) {
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300418 CX18_ERR("DVB failed to register\n");
Andy Walls9b4a7c82008-10-18 10:20:25 -0300419 return ret;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300420 }
421 }
422
Andy Walls3d059132009-01-10 21:54:39 -0300423 if (s->video_dev == NULL)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300424 return 0;
425
Andy Walls3d059132009-01-10 21:54:39 -0300426 num = s->video_dev->num;
Hans Verkuildd896012008-10-04 08:36:54 -0300427 /* card number + user defined offset + device offset */
428 if (type != CX18_ENC_STREAM_TYPE_MPG) {
429 struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
430
Andy Walls3d059132009-01-10 21:54:39 -0300431 if (s_mpg->video_dev)
432 num = s_mpg->video_dev->num
433 + cx18_stream_info[type].num_offset;
Hans Verkuildd896012008-10-04 08:36:54 -0300434 }
Andy Walls5811cf92009-02-14 17:08:37 -0300435 video_set_drvdata(s->video_dev, s);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300436
437 /* Register device. First try the desired minor, then any free one. */
Hans Verkuil6b5270d2009-09-06 07:54:00 -0300438 ret = video_register_device_no_warn(s->video_dev, vfl_type, num);
Andy Walls9b4a7c82008-10-18 10:20:25 -0300439 if (ret < 0) {
Hans Verkuil581644d2009-06-19 11:54:00 -0300440 CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n",
Hans Verkuildd896012008-10-04 08:36:54 -0300441 s->name, num);
Andy Walls3d059132009-01-10 21:54:39 -0300442 video_device_release(s->video_dev);
443 s->video_dev = NULL;
Andy Walls9b4a7c82008-10-18 10:20:25 -0300444 return ret;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300445 }
Laurent Pinchart38c7c032009-11-27 13:57:15 -0300446
447 name = video_device_node_name(s->video_dev);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300448
449 switch (vfl_type) {
450 case VFL_TYPE_GRABBER:
Laurent Pinchart38c7c032009-11-27 13:57:15 -0300451 CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n",
452 name, s->name, cx->stream_buffers[type],
Andy Walls22dce182009-11-09 23:55:30 -0300453 cx->stream_buf_size[type] / 1024,
454 (cx->stream_buf_size[type] * 100 / 1024) % 100);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300455 break;
456
457 case VFL_TYPE_RADIO:
Laurent Pinchart38c7c032009-11-27 13:57:15 -0300458 CX18_INFO("Registered device %s for %s\n", name, s->name);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300459 break;
460
461 case VFL_TYPE_VBI:
Andy Walls6ecd86d2008-12-07 23:30:17 -0300462 if (cx->stream_buffers[type])
Laurent Pinchart38c7c032009-11-27 13:57:15 -0300463 CX18_INFO("Registered device %s for %s "
Andy Walls6ecd86d2008-12-07 23:30:17 -0300464 "(%d x %d bytes)\n",
Laurent Pinchart38c7c032009-11-27 13:57:15 -0300465 name, s->name, cx->stream_buffers[type],
Andy Walls6ecd86d2008-12-07 23:30:17 -0300466 cx->stream_buf_size[type]);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300467 else
Laurent Pinchart38c7c032009-11-27 13:57:15 -0300468 CX18_INFO("Registered device %s for %s\n",
469 name, s->name);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300470 break;
471 }
472
473 return 0;
474}
475
476/* Register v4l2 devices */
477int cx18_streams_register(struct cx18 *cx)
478{
479 int type;
Andy Walls9b4a7c82008-10-18 10:20:25 -0300480 int err;
481 int ret = 0;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300482
483 /* Register V4L2 devices */
Andy Walls9b4a7c82008-10-18 10:20:25 -0300484 for (type = 0; type < CX18_MAX_STREAMS; type++) {
485 err = cx18_reg_dev(cx, type);
486 if (err && ret == 0)
487 ret = err;
488 }
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300489
Andy Walls9b4a7c82008-10-18 10:20:25 -0300490 if (ret == 0)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300491 return 0;
492
493 /* One or more streams could not be initialized. Clean 'em all up. */
Hans Verkuil3f983872008-05-01 10:31:12 -0300494 cx18_streams_cleanup(cx, 1);
Andy Walls9b4a7c82008-10-18 10:20:25 -0300495 return ret;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300496}
497
498/* Unregister v4l2 devices */
Hans Verkuil3f983872008-05-01 10:31:12 -0300499void cx18_streams_cleanup(struct cx18 *cx, int unregister)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300500{
501 struct video_device *vdev;
502 int type;
503
504 /* Teardown all streams */
505 for (type = 0; type < CX18_MAX_STREAMS; type++) {
Andy Walls7b1dde02009-12-31 01:35:08 -0300506
Andy Walls754f9962010-12-11 20:38:20 -0300507 /* The TS has a cx18_dvb structure, not a video_device */
Andy Walls7b1dde02009-12-31 01:35:08 -0300508 if (type == CX18_ENC_STREAM_TYPE_TS) {
Andy Walls754f9962010-12-11 20:38:20 -0300509 if (cx->streams[type].dvb != NULL) {
510 if (unregister)
511 cx18_dvb_unregister(&cx->streams[type]);
512 kfree(cx->streams[type].dvb);
513 cx->streams[type].dvb = NULL;
Andy Walls7b1dde02009-12-31 01:35:08 -0300514 cx18_stream_free(&cx->streams[type]);
515 }
516 continue;
Hans Verkuilfac36392008-07-18 10:07:10 -0300517 }
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300518
Andy Walls7b1dde02009-12-31 01:35:08 -0300519 /* No struct video_device, but can have buffers allocated */
520 if (type == CX18_ENC_STREAM_TYPE_IDX) {
Andy Walls0f890ab2011-03-27 20:19:15 -0300521 /* If the module params didn't inhibit IDX ... */
Andy Walls7b1dde02009-12-31 01:35:08 -0300522 if (cx->stream_buffers[type] != 0) {
523 cx->stream_buffers[type] = 0;
Andy Walls0f890ab2011-03-27 20:19:15 -0300524 /*
525 * Before calling cx18_stream_free(),
526 * check if the IDX stream was actually set up.
527 * Needed, since the cx18_probe() error path
528 * exits through here as well as normal clean up
529 */
530 if (cx->streams[type].buffers != 0)
531 cx18_stream_free(&cx->streams[type]);
Andy Walls7b1dde02009-12-31 01:35:08 -0300532 }
533 continue;
534 }
535
536 /* If struct video_device exists, can have buffers allocated */
Andy Walls3d059132009-01-10 21:54:39 -0300537 vdev = cx->streams[type].video_dev;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300538
Andy Walls3d059132009-01-10 21:54:39 -0300539 cx->streams[type].video_dev = NULL;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300540 if (vdev == NULL)
541 continue;
542
Simon Farnsworth1bf58422011-05-03 08:57:40 -0300543 if (type == CX18_ENC_STREAM_TYPE_YUV)
544 videobuf_mmap_free(&cx->streams[type].vbuf_q);
545
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300546 cx18_stream_free(&cx->streams[type]);
547
Hans Verkuil3f983872008-05-01 10:31:12 -0300548 /* Unregister or release device */
549 if (unregister)
550 video_unregister_device(vdev);
551 else
552 video_device_release(vdev);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300553 }
554}
555
556static void cx18_vbi_setup(struct cx18_stream *s)
557{
558 struct cx18 *cx = s->cx;
Andy Wallsdd073432008-12-12 16:24:04 -0300559 int raw = cx18_raw_vbi(cx);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300560 u32 data[CX2341X_MBOX_MAX_DATA];
561 int lines;
562
563 if (cx->is_60hz) {
564 cx->vbi.count = 12;
565 cx->vbi.start[0] = 10;
566 cx->vbi.start[1] = 273;
567 } else { /* PAL/SECAM */
568 cx->vbi.count = 18;
569 cx->vbi.start[0] = 6;
570 cx->vbi.start[1] = 318;
571 }
572
573 /* setup VBI registers */
Hans Verkuiladd632c2010-03-14 12:24:15 -0300574 if (raw)
575 v4l2_subdev_call(cx->sd_av, vbi, s_raw_fmt, &cx->vbi.in.fmt.vbi);
576 else
577 v4l2_subdev_call(cx->sd_av, vbi, s_sliced_fmt, &cx->vbi.in.fmt.sliced);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300578
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300579 /*
580 * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw
581 * VBI when the first analog capture channel starts, as once it starts
582 * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup
583 * (i.e. for the VBI capture channels). We also send it for each
584 * analog capture channel anyway just to make sure we get the proper
585 * behavior
586 */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300587 if (raw) {
588 lines = cx->vbi.count * 2;
589 } else {
Andy Walls812b1f92009-02-08 22:40:04 -0300590 /*
591 * For 525/60 systems, according to the VIP 2 & BT.656 std:
592 * The EAV RP code's Field bit toggles on line 4, a few lines
593 * after the Vertcal Blank bit has already toggled.
594 * Tell the encoder to capture 21-4+1=18 lines per field,
595 * since we want lines 10 through 21.
596 *
Andy Walls5ab74052009-05-10 22:14:29 -0300597 * For 625/50 systems, according to the VIP 2 & BT.656 std:
598 * The EAV RP code's Field bit toggles on line 1, a few lines
599 * after the Vertcal Blank bit has already toggled.
Andy Walls929a3ad2009-05-16 21:06:57 -0300600 * (We've actually set the digitizer so that the Field bit
601 * toggles on line 2.) Tell the encoder to capture 23-2+1=22
602 * lines per field, since we want lines 6 through 23.
Andy Walls812b1f92009-02-08 22:40:04 -0300603 */
Andy Walls929a3ad2009-05-16 21:06:57 -0300604 lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300605 }
606
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300607 data[0] = s->handle;
608 /* Lines per field */
609 data[1] = (lines / 2) | ((lines / 2) << 16);
610 /* bytes per line */
Andy Walls302df972009-01-31 00:33:02 -0300611 data[2] = (raw ? vbi_active_samples
612 : (cx->is_60hz ? vbi_hblank_samples_60Hz
613 : vbi_hblank_samples_50Hz));
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300614 /* Every X number of frames a VBI interrupt arrives
615 (frames as in 25 or 30 fps) */
616 data[3] = 1;
Andy Walls302df972009-01-31 00:33:02 -0300617 /*
618 * Set the SAV/EAV RP codes to look for as start/stop points
619 * when in VIP-1.1 mode
620 */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300621 if (raw) {
Andy Walls302df972009-01-31 00:33:02 -0300622 /*
623 * Start codes for beginning of "active" line in vertical blank
624 * 0x20 ( VerticalBlank )
625 * 0x60 ( EvenField VerticalBlank )
626 */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300627 data[4] = 0x20602060;
Andy Walls302df972009-01-31 00:33:02 -0300628 /*
629 * End codes for end of "active" raw lines and regular lines
630 * 0x30 ( VerticalBlank HorizontalBlank)
631 * 0x70 ( EvenField VerticalBlank HorizontalBlank)
632 * 0x90 (Task HorizontalBlank)
633 * 0xd0 (Task EvenField HorizontalBlank)
634 */
Andy Wallsaf009cf2008-12-12 20:00:29 -0300635 data[5] = 0x307090d0;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300636 } else {
Andy Walls302df972009-01-31 00:33:02 -0300637 /*
638 * End codes for active video, we want data in the hblank region
639 * 0xb0 (Task 0 VerticalBlank HorizontalBlank)
640 * 0xf0 (Task EvenField VerticalBlank HorizontalBlank)
641 *
642 * Since the V bit is only allowed to toggle in the EAV RP code,
643 * just before the first active region line, these two
Andy Walls812b1f92009-02-08 22:40:04 -0300644 * are problematic:
Andy Walls302df972009-01-31 00:33:02 -0300645 * 0x90 (Task HorizontalBlank)
646 * 0xd0 (Task EvenField HorizontalBlank)
Andy Walls812b1f92009-02-08 22:40:04 -0300647 *
Andy Wallsaf7c58b2009-02-28 20:13:50 -0300648 * We have set the digitzer such that we don't have to worry
649 * about these problem codes.
Andy Walls302df972009-01-31 00:33:02 -0300650 */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300651 data[4] = 0xB0F0B0F0;
Andy Walls302df972009-01-31 00:33:02 -0300652 /*
653 * Start codes for beginning of active line in vertical blank
654 * 0xa0 (Task VerticalBlank )
655 * 0xe0 (Task EvenField VerticalBlank )
656 */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300657 data[5] = 0xA0E0A0E0;
658 }
659
660 CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
661 data[0], data[1], data[2], data[3], data[4], data[5]);
662
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300663 cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300664}
665
Andy Wallsef9917972009-12-31 18:27:13 -0300666void cx18_stream_rotate_idx_mdls(struct cx18 *cx)
667{
668 struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
669 struct cx18_mdl *mdl;
670
671 if (!cx18_stream_enabled(s))
672 return;
673
674 /* Return if the firmware is not running low on MDLs */
675 if ((atomic_read(&s->q_free.depth) + atomic_read(&s->q_busy.depth)) >=
676 CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN)
677 return;
678
679 /* Return if there are no MDLs to rotate back to the firmware */
680 if (atomic_read(&s->q_full.depth) < 2)
681 return;
682
683 /*
684 * Take the oldest IDX MDL still holding data, and discard its index
685 * entries by scheduling the MDL to go back to the firmware
686 */
687 mdl = cx18_dequeue(s, &s->q_full);
688 if (mdl != NULL)
689 cx18_enqueue(s, mdl, &s->q_free);
690}
691
Andy Walls87116152009-04-13 22:42:43 -0300692static
Andy Walls52fcb3e2009-11-08 23:45:24 -0300693struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s,
694 struct cx18_mdl *mdl)
Andy Walls66c2a6b2008-12-08 23:02:45 -0300695{
696 struct cx18 *cx = s->cx;
697 struct cx18_queue *q;
698
699 /* Don't give it to the firmware, if we're not running a capture */
700 if (s->handle == CX18_INVALID_TASK_HANDLE ||
Andy Walls87116152009-04-13 22:42:43 -0300701 test_bit(CX18_F_S_STOPPING, &s->s_flags) ||
Andy Walls66c2a6b2008-12-08 23:02:45 -0300702 !test_bit(CX18_F_S_STREAMING, &s->s_flags))
Andy Walls52fcb3e2009-11-08 23:45:24 -0300703 return cx18_enqueue(s, mdl, &s->q_free);
Andy Walls66c2a6b2008-12-08 23:02:45 -0300704
Andy Walls52fcb3e2009-11-08 23:45:24 -0300705 q = cx18_enqueue(s, mdl, &s->q_busy);
Andy Walls66c2a6b2008-12-08 23:02:45 -0300706 if (q != &s->q_busy)
Andy Walls52fcb3e2009-11-08 23:45:24 -0300707 return q; /* The firmware has the max MDLs it can handle */
Andy Walls66c2a6b2008-12-08 23:02:45 -0300708
Andy Walls52fcb3e2009-11-08 23:45:24 -0300709 cx18_mdl_sync_for_device(s, mdl);
Andy Walls66c2a6b2008-12-08 23:02:45 -0300710 cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
Andy Walls52fcb3e2009-11-08 23:45:24 -0300711 (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem,
712 s->bufs_per_mdl, mdl->id, s->mdl_size);
Andy Walls66c2a6b2008-12-08 23:02:45 -0300713 return q;
714}
715
Andy Walls87116152009-04-13 22:42:43 -0300716static
717void _cx18_stream_load_fw_queue(struct cx18_stream *s)
Andy Walls66c2a6b2008-12-08 23:02:45 -0300718{
Andy Wallsabb096d2008-12-12 15:50:27 -0300719 struct cx18_queue *q;
Andy Walls52fcb3e2009-11-08 23:45:24 -0300720 struct cx18_mdl *mdl;
Andy Walls66c2a6b2008-12-08 23:02:45 -0300721
Andy Wallsc37b11b2009-11-04 23:13:58 -0300722 if (atomic_read(&s->q_free.depth) == 0 ||
723 atomic_read(&s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM)
Andy Wallsabb096d2008-12-12 15:50:27 -0300724 return;
Andy Walls66c2a6b2008-12-08 23:02:45 -0300725
Andy Wallsabb096d2008-12-12 15:50:27 -0300726 /* Move from q_free to q_busy notifying the firmware, until the limit */
727 do {
Andy Walls52fcb3e2009-11-08 23:45:24 -0300728 mdl = cx18_dequeue(s, &s->q_free);
729 if (mdl == NULL)
Andy Wallsabb096d2008-12-12 15:50:27 -0300730 break;
Andy Walls52fcb3e2009-11-08 23:45:24 -0300731 q = _cx18_stream_put_mdl_fw(s, mdl);
Andy Wallsc37b11b2009-11-04 23:13:58 -0300732 } while (atomic_read(&s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM
Andy Walls0ef02892008-12-14 18:52:12 -0300733 && q == &s->q_busy);
Andy Walls66c2a6b2008-12-08 23:02:45 -0300734}
735
Andy Walls87116152009-04-13 22:42:43 -0300736void cx18_out_work_handler(struct work_struct *work)
737{
Andy Walls21a278b2009-04-15 20:45:10 -0300738 struct cx18_stream *s =
739 container_of(work, struct cx18_stream, out_work_order);
Andy Walls87116152009-04-13 22:42:43 -0300740
Andy Walls21a278b2009-04-15 20:45:10 -0300741 _cx18_stream_load_fw_queue(s);
Andy Walls87116152009-04-13 22:42:43 -0300742}
743
Andy Walls52fcb3e2009-11-08 23:45:24 -0300744static void cx18_stream_configure_mdls(struct cx18_stream *s)
745{
746 cx18_unload_queues(s);
747
Andy Walls22dce182009-11-09 23:55:30 -0300748 switch (s->type) {
749 case CX18_ENC_STREAM_TYPE_YUV:
750 /*
751 * Height should be a multiple of 32 lines.
752 * Set the MDL size to the exact size needed for one frame.
753 * Use enough buffers per MDL to cover the MDL size
754 */
Simon Farnsworth1bf58422011-05-03 08:57:40 -0300755 if (s->pixelformat == V4L2_PIX_FMT_HM12)
756 s->mdl_size = 720 * s->cx->cxhdl.height * 3 / 2;
757 else
758 s->mdl_size = 720 * s->cx->cxhdl.height * 2;
Andy Walls22dce182009-11-09 23:55:30 -0300759 s->bufs_per_mdl = s->mdl_size / s->buf_size;
760 if (s->mdl_size % s->buf_size)
761 s->bufs_per_mdl++;
762 break;
Andy Walls127ce5f2009-11-11 00:22:57 -0300763 case CX18_ENC_STREAM_TYPE_VBI:
764 s->bufs_per_mdl = 1;
765 if (cx18_raw_vbi(s->cx)) {
766 s->mdl_size = (s->cx->is_60hz ? 12 : 18)
767 * 2 * vbi_active_samples;
768 } else {
769 /*
770 * See comment in cx18_vbi_setup() below about the
771 * extra lines we capture in sliced VBI mode due to
772 * the lines on which EAV RP codes toggle.
773 */
774 s->mdl_size = s->cx->is_60hz
775 ? (21 - 4 + 1) * 2 * vbi_hblank_samples_60Hz
776 : (23 - 2 + 1) * 2 * vbi_hblank_samples_50Hz;
777 }
778 break;
Andy Walls22dce182009-11-09 23:55:30 -0300779 default:
780 s->bufs_per_mdl = 1;
781 s->mdl_size = s->buf_size * s->bufs_per_mdl;
782 break;
783 }
Andy Walls52fcb3e2009-11-08 23:45:24 -0300784
785 cx18_load_queues(s);
786}
787
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300788int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
789{
790 u32 data[MAX_MB_ARGUMENTS];
791 struct cx18 *cx = s->cx;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300792 int captype = 0;
Andy Wallse46c54a2009-12-31 02:14:51 -0300793 struct cx18_stream *s_idx;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300794
Andy Walls540bab92009-12-31 00:26:49 -0300795 if (!cx18_stream_enabled(s))
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300796 return -EINVAL;
797
798 CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
799
800 switch (s->type) {
801 case CX18_ENC_STREAM_TYPE_MPG:
802 captype = CAPTURE_CHANNEL_TYPE_MPEG;
803 cx->mpg_data_received = cx->vbi_data_inserted = 0;
804 cx->dualwatch_jiffies = jiffies;
Hans Verkuila75b9be2010-12-31 10:22:52 -0300805 cx->dualwatch_stereo_mode = v4l2_ctrl_g_ctrl(cx->cxhdl.audio_mode);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300806 cx->search_pack_header = 0;
807 break;
808
Andy Wallse46c54a2009-12-31 02:14:51 -0300809 case CX18_ENC_STREAM_TYPE_IDX:
810 captype = CAPTURE_CHANNEL_TYPE_INDEX;
811 break;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300812 case CX18_ENC_STREAM_TYPE_TS:
813 captype = CAPTURE_CHANNEL_TYPE_TS;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300814 break;
815 case CX18_ENC_STREAM_TYPE_YUV:
816 captype = CAPTURE_CHANNEL_TYPE_YUV;
817 break;
818 case CX18_ENC_STREAM_TYPE_PCM:
819 captype = CAPTURE_CHANNEL_TYPE_PCM;
820 break;
821 case CX18_ENC_STREAM_TYPE_VBI:
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300822#ifdef CX18_ENCODER_PARSES_SLICED
Andy Wallsdd073432008-12-12 16:24:04 -0300823 captype = cx18_raw_vbi(cx) ?
824 CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300825#else
826 /*
827 * Currently we set things up so that Sliced VBI from the
828 * digitizer is handled as Raw VBI by the encoder
829 */
830 captype = CAPTURE_CHANNEL_TYPE_VBI;
831#endif
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300832 cx->vbi.frame = 0;
833 cx->vbi.inserted_frame = 0;
834 memset(cx->vbi.sliced_mpeg_size,
835 0, sizeof(cx->vbi.sliced_mpeg_size));
836 break;
837 default:
838 return -EINVAL;
839 }
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300840
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300841 /* Clear Streamoff flags in case left from last capture */
842 clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
843
844 cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
845 s->handle = data[0];
846 cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
847
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300848 /*
849 * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and
850 * set up all the parameters, as it is not obvious which parameters the
851 * firmware shares across capture channel types and which it does not.
852 *
853 * Some of the cx18_vapi() calls below apply to only certain capture
854 * channel types. We're hoping there's no harm in calling most of them
855 * anyway, as long as the values are all consistent. Setting some
856 * shared parameters will have no effect once an analog capture channel
857 * has started streaming.
858 */
859 if (captype != CAPTURE_CHANNEL_TYPE_TS) {
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300860 cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
861 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
862 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
863 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300864
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300865 /*
866 * Audio related reset according to
867 * Documentation/video4linux/cx2341x/fw-encoder-api.txt
868 */
869 if (atomic_read(&cx->ana_capturing) == 0)
870 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2,
871 s->handle, 12);
872
873 /*
874 * Number of lines for Field 1 & Field 2 according to
875 * Documentation/video4linux/cx2341x/fw-encoder-api.txt
Andy Wallsf37aa512009-02-07 01:15:44 -0300876 * Field 1 is 312 for 625 line systems in BT.656
877 * Field 2 is 313 for 625 line systems in BT.656
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300878 */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300879 cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
Andy Wallsf37aa512009-02-07 01:15:44 -0300880 s->handle, 312, 313);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300881
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300882 if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
883 cx18_vbi_setup(s);
884
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300885 /*
Andy Wallse46c54a2009-12-31 02:14:51 -0300886 * Select to receive I, P, and B frame index entries, if the
887 * index stream is enabled. Otherwise disable index entry
888 * generation.
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300889 */
Andy Wallse46c54a2009-12-31 02:14:51 -0300890 s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
Andy Walls5ada5772010-01-01 13:25:41 -0300891 cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 2,
892 s->handle, cx18_stream_enabled(s_idx) ? 7 : 0);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300893
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300894 /* Call out to the common CX2341x API setup for user controls */
Hans Verkuila75b9be2010-12-31 10:22:52 -0300895 cx->cxhdl.priv = s;
896 cx2341x_handler_setup(&cx->cxhdl);
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300897
898 /*
899 * When starting a capture and we're set for radio,
900 * ensure the video is muted, despite the user control.
901 */
Hans Verkuila75b9be2010-12-31 10:22:52 -0300902 if (!cx->cxhdl.video_mute &&
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300903 test_bit(CX18_F_I_RADIO_USER, &cx->i_flags))
904 cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle,
Hans Verkuila75b9be2010-12-31 10:22:52 -0300905 (v4l2_ctrl_g_ctrl(cx->cxhdl.video_mute_yuv) << 8) | 1);
Steven Tothb7101de2011-04-06 08:32:56 -0300906
907 /* Enable the Video Format Converter for UYVY 4:2:2 support,
908 * rather than the default HM12 Macroblovk 4:2:0 support.
909 */
910 if (captype == CAPTURE_CHANNEL_TYPE_YUV) {
Simon Farnsworth1bf58422011-05-03 08:57:40 -0300911 if (s->pixelformat == V4L2_PIX_FMT_UYVY)
Steven Tothb7101de2011-04-06 08:32:56 -0300912 cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
913 s->handle, 1);
914 else
915 /* If in doubt, default to HM12 */
916 cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
917 s->handle, 0);
918 }
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300919 }
920
Hans Verkuil31554ae2008-05-25 11:21:27 -0300921 if (atomic_read(&cx->tot_capturing) == 0) {
Hans Verkuila75b9be2010-12-31 10:22:52 -0300922 cx2341x_handler_set_busy(&cx->cxhdl, 1);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300923 clear_bit(CX18_F_I_EOS, &cx->i_flags);
Andy Wallsb1526422008-08-30 16:03:44 -0300924 cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300925 }
926
927 cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
Al Viro990c81c2008-05-21 00:32:01 -0300928 (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
929 (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300930
Andy Walls66c2a6b2008-12-08 23:02:45 -0300931 /* Init all the cpu_mdls for this stream */
Andy Walls52fcb3e2009-11-08 23:45:24 -0300932 cx18_stream_configure_mdls(s);
Andy Walls87116152009-04-13 22:42:43 -0300933 _cx18_stream_load_fw_queue(s);
Andy Walls66c2a6b2008-12-08 23:02:45 -0300934
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300935 /* begin_capture */
936 if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
937 CX18_DEBUG_WARN("Error starting capture!\n");
Andy Walls3b5df8e2008-08-23 18:36:50 -0300938 /* Ensure we're really not capturing before releasing MDLs */
Andy Walls87116152009-04-13 22:42:43 -0300939 set_bit(CX18_F_S_STOPPING, &s->s_flags);
Andy Walls3b5df8e2008-08-23 18:36:50 -0300940 if (s->type == CX18_ENC_STREAM_TYPE_MPG)
941 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
942 else
943 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
Andy Walls66c2a6b2008-12-08 23:02:45 -0300944 clear_bit(CX18_F_S_STREAMING, &s->s_flags);
945 /* FIXME - CX18_F_S_STREAMOFF as well? */
Andy Walls3b5df8e2008-08-23 18:36:50 -0300946 cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300947 cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
Andy Walls66c2a6b2008-12-08 23:02:45 -0300948 s->handle = CX18_INVALID_TASK_HANDLE;
Andy Walls87116152009-04-13 22:42:43 -0300949 clear_bit(CX18_F_S_STOPPING, &s->s_flags);
Andy Walls66c2a6b2008-12-08 23:02:45 -0300950 if (atomic_read(&cx->tot_capturing) == 0) {
951 set_bit(CX18_F_I_EOS, &cx->i_flags);
952 cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
953 }
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300954 return -EINVAL;
955 }
956
957 /* you're live! sit back and await interrupts :) */
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300958 if (captype != CAPTURE_CHANNEL_TYPE_TS)
Hans Verkuil31554ae2008-05-25 11:21:27 -0300959 atomic_inc(&cx->ana_capturing);
960 atomic_inc(&cx->tot_capturing);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300961 return 0;
962}
Devin Heitmueller0f4cf672009-11-19 23:23:57 -0300963EXPORT_SYMBOL(cx18_start_v4l2_encode_stream);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300964
965void cx18_stop_all_captures(struct cx18 *cx)
966{
967 int i;
968
969 for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
970 struct cx18_stream *s = &cx->streams[i];
971
Andy Walls540bab92009-12-31 00:26:49 -0300972 if (!cx18_stream_enabled(s))
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300973 continue;
974 if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
975 cx18_stop_v4l2_encode_stream(s, 0);
976 }
977}
978
979int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
980{
981 struct cx18 *cx = s->cx;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300982
Andy Walls540bab92009-12-31 00:26:49 -0300983 if (!cx18_stream_enabled(s))
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300984 return -EINVAL;
985
986 /* This function assumes that you are allowed to stop the capture
987 and that we are actually capturing */
988
989 CX18_DEBUG_INFO("Stop Capture\n");
990
Hans Verkuil31554ae2008-05-25 11:21:27 -0300991 if (atomic_read(&cx->tot_capturing) == 0)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300992 return 0;
993
Andy Walls87116152009-04-13 22:42:43 -0300994 set_bit(CX18_F_S_STOPPING, &s->s_flags);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300995 if (s->type == CX18_ENC_STREAM_TYPE_MPG)
996 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
997 else
998 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
999
Hans Verkuil1c1e45d2008-04-28 20:24:33 -03001000 if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
1001 CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
1002 }
1003
Hans Verkuil31554ae2008-05-25 11:21:27 -03001004 if (s->type != CX18_ENC_STREAM_TYPE_TS)
1005 atomic_dec(&cx->ana_capturing);
1006 atomic_dec(&cx->tot_capturing);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -03001007
1008 /* Clear capture and no-read bits */
1009 clear_bit(CX18_F_S_STREAMING, &s->s_flags);
1010
Andy Wallsf68d0cf2008-11-05 21:19:15 -03001011 /* Tell the CX23418 it can't use our buffers anymore */
1012 cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
1013
Hans Verkuil1c1e45d2008-04-28 20:24:33 -03001014 cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
Andy Wallsd3c5e702008-08-23 16:42:29 -03001015 s->handle = CX18_INVALID_TASK_HANDLE;
Andy Walls87116152009-04-13 22:42:43 -03001016 clear_bit(CX18_F_S_STOPPING, &s->s_flags);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -03001017
Hans Verkuil31554ae2008-05-25 11:21:27 -03001018 if (atomic_read(&cx->tot_capturing) > 0)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -03001019 return 0;
1020
Hans Verkuila75b9be2010-12-31 10:22:52 -03001021 cx2341x_handler_set_busy(&cx->cxhdl, 0);
Andy Wallsb1526422008-08-30 16:03:44 -03001022 cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -03001023 wake_up(&s->waitq);
1024
1025 return 0;
1026}
Devin Heitmueller0f4cf672009-11-19 23:23:57 -03001027EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -03001028
1029u32 cx18_find_handle(struct cx18 *cx)
1030{
1031 int i;
1032
1033 /* find first available handle to be used for global settings */
1034 for (i = 0; i < CX18_MAX_STREAMS; i++) {
1035 struct cx18_stream *s = &cx->streams[i];
1036
Andy Walls3d059132009-01-10 21:54:39 -03001037 if (s->video_dev && (s->handle != CX18_INVALID_TASK_HANDLE))
Hans Verkuil1c1e45d2008-04-28 20:24:33 -03001038 return s->handle;
1039 }
Andy Wallsd3c5e702008-08-23 16:42:29 -03001040 return CX18_INVALID_TASK_HANDLE;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -03001041}
Andy Wallsee2d64f2008-11-16 01:38:19 -03001042
1043struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
1044{
1045 int i;
1046 struct cx18_stream *s;
1047
1048 if (handle == CX18_INVALID_TASK_HANDLE)
1049 return NULL;
1050
1051 for (i = 0; i < CX18_MAX_STREAMS; i++) {
1052 s = &cx->streams[i];
1053 if (s->handle != handle)
1054 continue;
Andy Walls540bab92009-12-31 00:26:49 -03001055 if (cx18_stream_enabled(s))
Andy Wallsee2d64f2008-11-16 01:38:19 -03001056 return s;
1057 }
1058 return NULL;
1059}