Sudeep Dutt | b170d8c | 2013-09-05 16:41:31 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Intel MIC Platform Software Stack (MPSS) |
| 3 | * |
| 4 | * Copyright(c) 2013 Intel Corporation. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License, version 2, as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, but |
| 11 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 13 | * General Public License for more details. |
| 14 | * |
| 15 | * The full GNU General Public License is included in this distribution in |
| 16 | * the file called "COPYING". |
| 17 | * |
| 18 | * Intel MIC Host driver. |
| 19 | * |
| 20 | */ |
| 21 | #include <linux/fs.h> |
| 22 | #include <linux/pci.h> |
Sudeep Dutt | 3a6a920 | 2013-09-05 16:41:55 -0700 | [diff] [blame] | 23 | #include <linux/sched.h> |
| 24 | #include <linux/firmware.h> |
| 25 | #include <linux/delay.h> |
Sudeep Dutt | b170d8c | 2013-09-05 16:41:31 -0700 | [diff] [blame] | 26 | |
Sudeep Dutt | 4aa7996 | 2013-09-27 09:49:42 -0700 | [diff] [blame^] | 27 | #include "../common/mic_dev.h" |
Sudeep Dutt | b170d8c | 2013-09-05 16:41:31 -0700 | [diff] [blame] | 28 | #include "mic_device.h" |
| 29 | #include "mic_x100.h" |
Dasaratharaman Chandramouli | a01e28f | 2013-09-05 16:41:41 -0700 | [diff] [blame] | 30 | #include "mic_smpt.h" |
Sudeep Dutt | b170d8c | 2013-09-05 16:41:31 -0700 | [diff] [blame] | 31 | |
| 32 | /** |
| 33 | * mic_x100_write_spad - write to the scratchpad register |
| 34 | * @mdev: pointer to mic_device instance |
| 35 | * @idx: index to the scratchpad register, 0 based |
| 36 | * @val: the data value to put into the register |
| 37 | * |
| 38 | * This function allows writing of a 32bit value to the indexed scratchpad |
| 39 | * register. |
| 40 | * |
| 41 | * RETURNS: none. |
| 42 | */ |
| 43 | static void |
| 44 | mic_x100_write_spad(struct mic_device *mdev, unsigned int idx, u32 val) |
| 45 | { |
| 46 | dev_dbg(mdev->sdev->parent, "Writing 0x%x to scratch pad index %d\n", |
| 47 | val, idx); |
| 48 | mic_mmio_write(&mdev->mmio, val, |
| 49 | MIC_X100_SBOX_BASE_ADDRESS + |
| 50 | MIC_X100_SBOX_SPAD0 + idx * 4); |
| 51 | } |
| 52 | |
| 53 | /** |
| 54 | * mic_x100_read_spad - read from the scratchpad register |
| 55 | * @mdev: pointer to mic_device instance |
| 56 | * @idx: index to scratchpad register, 0 based |
| 57 | * |
| 58 | * This function allows reading of the 32bit scratchpad register. |
| 59 | * |
| 60 | * RETURNS: An appropriate -ERRNO error value on error, or zero for success. |
| 61 | */ |
| 62 | static u32 |
| 63 | mic_x100_read_spad(struct mic_device *mdev, unsigned int idx) |
| 64 | { |
| 65 | u32 val = mic_mmio_read(&mdev->mmio, |
| 66 | MIC_X100_SBOX_BASE_ADDRESS + |
| 67 | MIC_X100_SBOX_SPAD0 + idx * 4); |
| 68 | |
| 69 | dev_dbg(mdev->sdev->parent, |
| 70 | "Reading 0x%x from scratch pad index %d\n", val, idx); |
| 71 | return val; |
| 72 | } |
| 73 | |
Dasaratharaman Chandramouli | a01e28f | 2013-09-05 16:41:41 -0700 | [diff] [blame] | 74 | /** |
| 75 | * mic_x100_enable_interrupts - Enable interrupts. |
| 76 | * @mdev: pointer to mic_device instance |
| 77 | */ |
| 78 | static void mic_x100_enable_interrupts(struct mic_device *mdev) |
| 79 | { |
| 80 | u32 reg; |
| 81 | struct mic_mw *mw = &mdev->mmio; |
| 82 | u32 sice0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SICE0; |
| 83 | u32 siac0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SIAC0; |
| 84 | |
| 85 | reg = mic_mmio_read(mw, sice0); |
| 86 | reg |= MIC_X100_SBOX_DBR_BITS(0xf) | MIC_X100_SBOX_DMA_BITS(0xff); |
| 87 | mic_mmio_write(mw, reg, sice0); |
| 88 | |
| 89 | /* |
| 90 | * Enable auto-clear when enabling interrupts. Applicable only for |
| 91 | * MSI-x. Legacy and MSI mode cannot have auto-clear enabled. |
| 92 | */ |
| 93 | if (mdev->irq_info.num_vectors > 1) { |
| 94 | reg = mic_mmio_read(mw, siac0); |
| 95 | reg |= MIC_X100_SBOX_DBR_BITS(0xf) | |
| 96 | MIC_X100_SBOX_DMA_BITS(0xff); |
| 97 | mic_mmio_write(mw, reg, siac0); |
| 98 | } |
| 99 | } |
| 100 | |
| 101 | /** |
| 102 | * mic_x100_disable_interrupts - Disable interrupts. |
| 103 | * @mdev: pointer to mic_device instance |
| 104 | */ |
| 105 | static void mic_x100_disable_interrupts(struct mic_device *mdev) |
| 106 | { |
| 107 | u32 reg; |
| 108 | struct mic_mw *mw = &mdev->mmio; |
| 109 | u32 sice0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SICE0; |
| 110 | u32 siac0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SIAC0; |
| 111 | u32 sicc0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SICC0; |
| 112 | |
| 113 | reg = mic_mmio_read(mw, sice0); |
| 114 | mic_mmio_write(mw, reg, sicc0); |
| 115 | |
| 116 | if (mdev->irq_info.num_vectors > 1) { |
| 117 | reg = mic_mmio_read(mw, siac0); |
| 118 | reg &= ~(MIC_X100_SBOX_DBR_BITS(0xf) | |
| 119 | MIC_X100_SBOX_DMA_BITS(0xff)); |
| 120 | mic_mmio_write(mw, reg, siac0); |
| 121 | } |
| 122 | } |
| 123 | |
| 124 | /** |
| 125 | * mic_x100_send_sbox_intr - Send an MIC_X100_SBOX interrupt to MIC. |
| 126 | * @mdev: pointer to mic_device instance |
| 127 | */ |
| 128 | static void mic_x100_send_sbox_intr(struct mic_device *mdev, |
| 129 | int doorbell) |
| 130 | { |
| 131 | struct mic_mw *mw = &mdev->mmio; |
| 132 | u64 apic_icr_offset = MIC_X100_SBOX_APICICR0 + doorbell * 8; |
| 133 | u32 apicicr_low = mic_mmio_read(mw, |
| 134 | MIC_X100_SBOX_BASE_ADDRESS + apic_icr_offset); |
| 135 | |
| 136 | /* for MIC we need to make sure we "hit" the send_icr bit (13) */ |
| 137 | apicicr_low = (apicicr_low | (1 << 13)); |
| 138 | |
| 139 | /* Ensure that the interrupt is ordered w.r.t. previous stores. */ |
| 140 | wmb(); |
| 141 | mic_mmio_write(mw, apicicr_low, |
| 142 | MIC_X100_SBOX_BASE_ADDRESS + apic_icr_offset); |
| 143 | } |
| 144 | |
| 145 | /** |
| 146 | * mic_x100_send_rdmasr_intr - Send an RDMASR interrupt to MIC. |
| 147 | * @mdev: pointer to mic_device instance |
| 148 | */ |
| 149 | static void mic_x100_send_rdmasr_intr(struct mic_device *mdev, |
| 150 | int doorbell) |
| 151 | { |
| 152 | int rdmasr_offset = MIC_X100_SBOX_RDMASR0 + (doorbell << 2); |
| 153 | /* Ensure that the interrupt is ordered w.r.t. previous stores. */ |
| 154 | wmb(); |
| 155 | mic_mmio_write(&mdev->mmio, 0, |
| 156 | MIC_X100_SBOX_BASE_ADDRESS + rdmasr_offset); |
| 157 | } |
| 158 | |
| 159 | /** |
| 160 | * __mic_x100_send_intr - Send interrupt to MIC. |
| 161 | * @mdev: pointer to mic_device instance |
| 162 | * @doorbell: doorbell number. |
| 163 | */ |
| 164 | static void mic_x100_send_intr(struct mic_device *mdev, int doorbell) |
| 165 | { |
| 166 | int rdmasr_db; |
| 167 | if (doorbell < MIC_X100_NUM_SBOX_IRQ) { |
| 168 | mic_x100_send_sbox_intr(mdev, doorbell); |
| 169 | } else { |
| 170 | rdmasr_db = doorbell - MIC_X100_NUM_SBOX_IRQ + |
| 171 | MIC_X100_RDMASR_IRQ_BASE; |
| 172 | mic_x100_send_rdmasr_intr(mdev, rdmasr_db); |
| 173 | } |
| 174 | } |
| 175 | |
| 176 | /** |
| 177 | * mic_ack_interrupt - Device specific interrupt handling. |
| 178 | * @mdev: pointer to mic_device instance |
| 179 | * |
| 180 | * Returns: bitmask of doorbell events triggered. |
| 181 | */ |
| 182 | static u32 mic_x100_ack_interrupt(struct mic_device *mdev) |
| 183 | { |
| 184 | u32 reg = 0; |
| 185 | struct mic_mw *mw = &mdev->mmio; |
| 186 | u32 sicr0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SICR0; |
| 187 | |
| 188 | /* Clear pending bit array. */ |
| 189 | if (MIC_A0_STEP == mdev->stepping) |
| 190 | mic_mmio_write(mw, 1, MIC_X100_SBOX_BASE_ADDRESS + |
| 191 | MIC_X100_SBOX_MSIXPBACR); |
| 192 | |
| 193 | if (mdev->irq_info.num_vectors <= 1) { |
| 194 | reg = mic_mmio_read(mw, sicr0); |
| 195 | |
| 196 | if (unlikely(!reg)) |
| 197 | goto done; |
| 198 | |
| 199 | mic_mmio_write(mw, reg, sicr0); |
| 200 | } |
| 201 | |
| 202 | if (mdev->stepping >= MIC_B0_STEP) |
| 203 | mdev->intr_ops->enable_interrupts(mdev); |
| 204 | done: |
| 205 | return reg; |
| 206 | } |
| 207 | |
| 208 | /** |
| 209 | * mic_x100_hw_intr_init - Initialize h/w specific interrupt |
| 210 | * information. |
| 211 | * @mdev: pointer to mic_device instance |
| 212 | */ |
| 213 | static void mic_x100_hw_intr_init(struct mic_device *mdev) |
| 214 | { |
| 215 | mdev->intr_info = (struct mic_intr_info *) mic_x100_intr_init; |
| 216 | } |
| 217 | |
| 218 | /** |
| 219 | * mic_x100_read_msi_to_src_map - read from the MSI mapping registers |
| 220 | * @mdev: pointer to mic_device instance |
| 221 | * @idx: index to the mapping register, 0 based |
| 222 | * |
| 223 | * This function allows reading of the 32bit MSI mapping register. |
| 224 | * |
| 225 | * RETURNS: The value in the register. |
| 226 | */ |
| 227 | static u32 |
| 228 | mic_x100_read_msi_to_src_map(struct mic_device *mdev, int idx) |
| 229 | { |
| 230 | return mic_mmio_read(&mdev->mmio, |
| 231 | MIC_X100_SBOX_BASE_ADDRESS + |
| 232 | MIC_X100_SBOX_MXAR0 + idx * 4); |
| 233 | } |
| 234 | |
| 235 | /** |
| 236 | * mic_x100_program_msi_to_src_map - program the MSI mapping registers |
| 237 | * @mdev: pointer to mic_device instance |
| 238 | * @idx: index to the mapping register, 0 based |
| 239 | * @offset: The bit offset in the register that needs to be updated. |
| 240 | * @set: boolean specifying if the bit in the specified offset needs |
| 241 | * to be set or cleared. |
| 242 | * |
| 243 | * RETURNS: None. |
| 244 | */ |
| 245 | static void |
| 246 | mic_x100_program_msi_to_src_map(struct mic_device *mdev, |
| 247 | int idx, int offset, bool set) |
| 248 | { |
| 249 | unsigned long reg; |
| 250 | struct mic_mw *mw = &mdev->mmio; |
| 251 | u32 mxar = MIC_X100_SBOX_BASE_ADDRESS + |
| 252 | MIC_X100_SBOX_MXAR0 + idx * 4; |
| 253 | |
| 254 | reg = mic_mmio_read(mw, mxar); |
| 255 | if (set) |
| 256 | __set_bit(offset, ®); |
| 257 | else |
| 258 | __clear_bit(offset, ®); |
| 259 | mic_mmio_write(mw, reg, mxar); |
| 260 | } |
| 261 | |
Sudeep Dutt | 3a6a920 | 2013-09-05 16:41:55 -0700 | [diff] [blame] | 262 | /* |
| 263 | * mic_x100_reset_fw_ready - Reset Firmware ready status field. |
| 264 | * @mdev: pointer to mic_device instance |
| 265 | */ |
| 266 | static void mic_x100_reset_fw_ready(struct mic_device *mdev) |
| 267 | { |
| 268 | mdev->ops->write_spad(mdev, MIC_X100_DOWNLOAD_INFO, 0); |
| 269 | } |
| 270 | |
| 271 | /* |
| 272 | * mic_x100_is_fw_ready - Check if firmware is ready. |
| 273 | * @mdev: pointer to mic_device instance |
| 274 | */ |
| 275 | static bool mic_x100_is_fw_ready(struct mic_device *mdev) |
| 276 | { |
| 277 | u32 scratch2 = mdev->ops->read_spad(mdev, MIC_X100_DOWNLOAD_INFO); |
| 278 | return MIC_X100_SPAD2_DOWNLOAD_STATUS(scratch2) ? true : false; |
| 279 | } |
| 280 | |
| 281 | /** |
| 282 | * mic_x100_get_apic_id - Get bootstrap APIC ID. |
| 283 | * @mdev: pointer to mic_device instance |
| 284 | */ |
| 285 | static u32 mic_x100_get_apic_id(struct mic_device *mdev) |
| 286 | { |
| 287 | u32 scratch2 = 0; |
| 288 | |
| 289 | scratch2 = mdev->ops->read_spad(mdev, MIC_X100_DOWNLOAD_INFO); |
| 290 | return MIC_X100_SPAD2_APIC_ID(scratch2); |
| 291 | } |
| 292 | |
| 293 | /** |
| 294 | * mic_x100_send_firmware_intr - Send an interrupt to the firmware on MIC. |
| 295 | * @mdev: pointer to mic_device instance |
| 296 | */ |
| 297 | static void mic_x100_send_firmware_intr(struct mic_device *mdev) |
| 298 | { |
| 299 | u32 apicicr_low; |
| 300 | u64 apic_icr_offset = MIC_X100_SBOX_APICICR7; |
| 301 | int vector = MIC_X100_BSP_INTERRUPT_VECTOR; |
| 302 | struct mic_mw *mw = &mdev->mmio; |
| 303 | |
| 304 | /* |
| 305 | * For MIC we need to make sure we "hit" |
| 306 | * the send_icr bit (13). |
| 307 | */ |
| 308 | apicicr_low = (vector | (1 << 13)); |
| 309 | |
| 310 | mic_mmio_write(mw, mic_x100_get_apic_id(mdev), |
| 311 | MIC_X100_SBOX_BASE_ADDRESS + apic_icr_offset + 4); |
| 312 | |
| 313 | /* Ensure that the interrupt is ordered w.r.t. previous stores. */ |
| 314 | wmb(); |
| 315 | mic_mmio_write(mw, apicicr_low, |
| 316 | MIC_X100_SBOX_BASE_ADDRESS + apic_icr_offset); |
| 317 | } |
| 318 | |
| 319 | /** |
| 320 | * mic_x100_hw_reset - Reset the MIC device. |
| 321 | * @mdev: pointer to mic_device instance |
| 322 | */ |
| 323 | static void mic_x100_hw_reset(struct mic_device *mdev) |
| 324 | { |
| 325 | u32 reset_reg; |
| 326 | u32 rgcr = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_RGCR; |
| 327 | struct mic_mw *mw = &mdev->mmio; |
| 328 | |
| 329 | /* Ensure that the reset is ordered w.r.t. previous loads and stores */ |
| 330 | mb(); |
| 331 | /* Trigger reset */ |
| 332 | reset_reg = mic_mmio_read(mw, rgcr); |
| 333 | reset_reg |= 0x1; |
| 334 | mic_mmio_write(mw, reset_reg, rgcr); |
| 335 | /* |
| 336 | * It seems we really want to delay at least 1 second |
| 337 | * after touching reset to prevent a lot of problems. |
| 338 | */ |
| 339 | msleep(1000); |
| 340 | } |
| 341 | |
| 342 | /** |
| 343 | * mic_x100_load_command_line - Load command line to MIC. |
| 344 | * @mdev: pointer to mic_device instance |
| 345 | * @fw: the firmware image |
| 346 | * |
| 347 | * RETURNS: An appropriate -ERRNO error value on error, or zero for success. |
| 348 | */ |
| 349 | static int |
| 350 | mic_x100_load_command_line(struct mic_device *mdev, const struct firmware *fw) |
| 351 | { |
| 352 | u32 len = 0; |
| 353 | u32 boot_mem; |
| 354 | char *buf; |
| 355 | void __iomem *cmd_line_va = mdev->aper.va + mdev->bootaddr + fw->size; |
| 356 | #define CMDLINE_SIZE 2048 |
| 357 | |
| 358 | boot_mem = mdev->aper.len >> 20; |
| 359 | buf = kzalloc(CMDLINE_SIZE, GFP_KERNEL); |
| 360 | if (!buf) { |
| 361 | dev_err(mdev->sdev->parent, |
| 362 | "%s %d allocation failed\n", __func__, __LINE__); |
| 363 | return -ENOMEM; |
| 364 | } |
| 365 | len += snprintf(buf, CMDLINE_SIZE - len, |
| 366 | " mem=%dM", boot_mem); |
| 367 | if (mdev->cmdline) |
| 368 | snprintf(buf + len, CMDLINE_SIZE - len, |
| 369 | " %s", mdev->cmdline); |
| 370 | memcpy_toio(cmd_line_va, buf, strlen(buf) + 1); |
| 371 | kfree(buf); |
| 372 | return 0; |
| 373 | } |
| 374 | |
| 375 | /** |
| 376 | * mic_x100_load_ramdisk - Load ramdisk to MIC. |
| 377 | * @mdev: pointer to mic_device instance |
| 378 | * |
| 379 | * RETURNS: An appropriate -ERRNO error value on error, or zero for success. |
| 380 | */ |
| 381 | static int |
| 382 | mic_x100_load_ramdisk(struct mic_device *mdev) |
| 383 | { |
| 384 | const struct firmware *fw; |
| 385 | int rc; |
| 386 | struct boot_params __iomem *bp = mdev->aper.va + mdev->bootaddr; |
| 387 | |
| 388 | rc = request_firmware(&fw, |
| 389 | mdev->ramdisk, mdev->sdev->parent); |
| 390 | if (rc < 0) { |
| 391 | dev_err(mdev->sdev->parent, |
| 392 | "ramdisk request_firmware failed: %d %s\n", |
| 393 | rc, mdev->ramdisk); |
| 394 | goto error; |
| 395 | } |
| 396 | /* |
| 397 | * Typically the bootaddr for card OS is 64M |
| 398 | * so copy over the ramdisk @ 128M. |
| 399 | */ |
| 400 | memcpy_toio(mdev->aper.va + (mdev->bootaddr << 1), |
| 401 | fw->data, fw->size); |
| 402 | iowrite32(cpu_to_le32(mdev->bootaddr << 1), &bp->hdr.ramdisk_image); |
| 403 | iowrite32(cpu_to_le32(fw->size), &bp->hdr.ramdisk_size); |
| 404 | release_firmware(fw); |
| 405 | error: |
| 406 | return rc; |
| 407 | } |
| 408 | |
| 409 | /** |
| 410 | * mic_x100_get_boot_addr - Get MIC boot address. |
| 411 | * @mdev: pointer to mic_device instance |
| 412 | * |
| 413 | * This function is called during firmware load to determine |
| 414 | * the address at which the OS should be downloaded in card |
| 415 | * memory i.e. GDDR. |
| 416 | * RETURNS: An appropriate -ERRNO error value on error, or zero for success. |
| 417 | */ |
| 418 | static int |
| 419 | mic_x100_get_boot_addr(struct mic_device *mdev) |
| 420 | { |
| 421 | u32 scratch2, boot_addr; |
| 422 | int rc = 0; |
| 423 | |
| 424 | scratch2 = mdev->ops->read_spad(mdev, MIC_X100_DOWNLOAD_INFO); |
| 425 | boot_addr = MIC_X100_SPAD2_DOWNLOAD_ADDR(scratch2); |
| 426 | dev_dbg(mdev->sdev->parent, "%s %d boot_addr 0x%x\n", |
| 427 | __func__, __LINE__, boot_addr); |
| 428 | if (boot_addr > (1 << 31)) { |
| 429 | dev_err(mdev->sdev->parent, |
| 430 | "incorrect bootaddr 0x%x\n", |
| 431 | boot_addr); |
| 432 | rc = -EINVAL; |
| 433 | goto error; |
| 434 | } |
| 435 | mdev->bootaddr = boot_addr; |
| 436 | error: |
| 437 | return rc; |
| 438 | } |
| 439 | |
| 440 | /** |
| 441 | * mic_x100_load_firmware - Load firmware to MIC. |
| 442 | * @mdev: pointer to mic_device instance |
| 443 | * @buf: buffer containing boot string including firmware/ramdisk path. |
| 444 | * |
| 445 | * RETURNS: An appropriate -ERRNO error value on error, or zero for success. |
| 446 | */ |
| 447 | static int |
| 448 | mic_x100_load_firmware(struct mic_device *mdev, const char *buf) |
| 449 | { |
| 450 | int rc; |
| 451 | const struct firmware *fw; |
| 452 | |
| 453 | rc = mic_x100_get_boot_addr(mdev); |
| 454 | if (rc) |
| 455 | goto error; |
| 456 | /* load OS */ |
| 457 | rc = request_firmware(&fw, mdev->firmware, mdev->sdev->parent); |
| 458 | if (rc < 0) { |
| 459 | dev_err(mdev->sdev->parent, |
| 460 | "ramdisk request_firmware failed: %d %s\n", |
| 461 | rc, mdev->firmware); |
| 462 | goto error; |
| 463 | } |
| 464 | if (mdev->bootaddr > mdev->aper.len - fw->size) { |
| 465 | rc = -EINVAL; |
| 466 | dev_err(mdev->sdev->parent, "%s %d rc %d bootaddr 0x%x\n", |
| 467 | __func__, __LINE__, rc, mdev->bootaddr); |
| 468 | release_firmware(fw); |
| 469 | goto error; |
| 470 | } |
| 471 | memcpy_toio(mdev->aper.va + mdev->bootaddr, fw->data, fw->size); |
| 472 | mdev->ops->write_spad(mdev, MIC_X100_FW_SIZE, fw->size); |
| 473 | if (!strcmp(mdev->bootmode, "elf")) |
| 474 | goto done; |
| 475 | /* load command line */ |
| 476 | rc = mic_x100_load_command_line(mdev, fw); |
| 477 | if (rc) { |
| 478 | dev_err(mdev->sdev->parent, "%s %d rc %d\n", |
| 479 | __func__, __LINE__, rc); |
| 480 | goto error; |
| 481 | } |
| 482 | release_firmware(fw); |
| 483 | /* load ramdisk */ |
| 484 | if (mdev->ramdisk) |
| 485 | rc = mic_x100_load_ramdisk(mdev); |
| 486 | error: |
| 487 | dev_dbg(mdev->sdev->parent, "%s %d rc %d\n", |
| 488 | __func__, __LINE__, rc); |
| 489 | done: |
| 490 | return rc; |
| 491 | } |
| 492 | |
| 493 | /** |
| 494 | * mic_x100_get_postcode - Get postcode status from firmware. |
| 495 | * @mdev: pointer to mic_device instance |
| 496 | * |
| 497 | * RETURNS: postcode. |
| 498 | */ |
| 499 | static u32 mic_x100_get_postcode(struct mic_device *mdev) |
| 500 | { |
| 501 | return mic_mmio_read(&mdev->mmio, MIC_X100_POSTCODE); |
| 502 | } |
| 503 | |
Dasaratharaman Chandramouli | a01e28f | 2013-09-05 16:41:41 -0700 | [diff] [blame] | 504 | /** |
| 505 | * mic_x100_smpt_set - Update an SMPT entry with a DMA address. |
| 506 | * @mdev: pointer to mic_device instance |
| 507 | * |
| 508 | * RETURNS: none. |
| 509 | */ |
| 510 | static void |
| 511 | mic_x100_smpt_set(struct mic_device *mdev, dma_addr_t dma_addr, u8 index) |
| 512 | { |
| 513 | #define SNOOP_ON (0 << 0) |
| 514 | #define SNOOP_OFF (1 << 0) |
| 515 | /* |
| 516 | * Sbox Smpt Reg Bits: |
| 517 | * Bits 31:2 Host address |
| 518 | * Bits 1 RSVD |
| 519 | * Bits 0 No snoop |
| 520 | */ |
| 521 | #define BUILD_SMPT(NO_SNOOP, HOST_ADDR) \ |
| 522 | (u32)(((HOST_ADDR) << 2) | ((NO_SNOOP) & 0x01)) |
| 523 | |
| 524 | uint32_t smpt_reg_val = BUILD_SMPT(SNOOP_ON, |
| 525 | dma_addr >> mdev->smpt->info.page_shift); |
| 526 | mic_mmio_write(&mdev->mmio, smpt_reg_val, |
| 527 | MIC_X100_SBOX_BASE_ADDRESS + |
| 528 | MIC_X100_SBOX_SMPT00 + (4 * index)); |
| 529 | } |
| 530 | |
| 531 | /** |
| 532 | * mic_x100_smpt_hw_init - Initialize SMPT X100 specific fields. |
| 533 | * @mdev: pointer to mic_device instance |
| 534 | * |
| 535 | * RETURNS: none. |
| 536 | */ |
| 537 | static void mic_x100_smpt_hw_init(struct mic_device *mdev) |
| 538 | { |
| 539 | struct mic_smpt_hw_info *info = &mdev->smpt->info; |
| 540 | |
| 541 | info->num_reg = 32; |
| 542 | info->page_shift = 34; |
| 543 | info->page_size = (1ULL << info->page_shift); |
| 544 | info->base = 0x8000000000ULL; |
| 545 | } |
| 546 | |
| 547 | struct mic_smpt_ops mic_x100_smpt_ops = { |
| 548 | .init = mic_x100_smpt_hw_init, |
| 549 | .set = mic_x100_smpt_set, |
| 550 | }; |
| 551 | |
Sudeep Dutt | b170d8c | 2013-09-05 16:41:31 -0700 | [diff] [blame] | 552 | struct mic_hw_ops mic_x100_ops = { |
| 553 | .aper_bar = MIC_X100_APER_BAR, |
| 554 | .mmio_bar = MIC_X100_MMIO_BAR, |
| 555 | .read_spad = mic_x100_read_spad, |
| 556 | .write_spad = mic_x100_write_spad, |
Dasaratharaman Chandramouli | a01e28f | 2013-09-05 16:41:41 -0700 | [diff] [blame] | 557 | .send_intr = mic_x100_send_intr, |
| 558 | .ack_interrupt = mic_x100_ack_interrupt, |
Sudeep Dutt | 3a6a920 | 2013-09-05 16:41:55 -0700 | [diff] [blame] | 559 | .reset = mic_x100_hw_reset, |
| 560 | .reset_fw_ready = mic_x100_reset_fw_ready, |
| 561 | .is_fw_ready = mic_x100_is_fw_ready, |
| 562 | .send_firmware_intr = mic_x100_send_firmware_intr, |
| 563 | .load_mic_fw = mic_x100_load_firmware, |
| 564 | .get_postcode = mic_x100_get_postcode, |
Dasaratharaman Chandramouli | a01e28f | 2013-09-05 16:41:41 -0700 | [diff] [blame] | 565 | }; |
| 566 | |
| 567 | struct mic_hw_intr_ops mic_x100_intr_ops = { |
| 568 | .intr_init = mic_x100_hw_intr_init, |
| 569 | .enable_interrupts = mic_x100_enable_interrupts, |
| 570 | .disable_interrupts = mic_x100_disable_interrupts, |
| 571 | .program_msi_to_src_map = mic_x100_program_msi_to_src_map, |
| 572 | .read_msi_to_src_map = mic_x100_read_msi_to_src_map, |
Sudeep Dutt | b170d8c | 2013-09-05 16:41:31 -0700 | [diff] [blame] | 573 | }; |