| NVIDIA Tegra Hardware Synchronization Primitives (HSP) |
| |
| The HSP modules are used for the processors to share resources and communicate |
| together. It provides a set of hardware synchronization primitives for |
| interprocessor communication. So the interprocessor communication (IPC) |
| protocols can use hardware synchronization primitives, when operating between |
| two processors not in an SMP relationship. |
| |
| The features that HSP supported are shared mailboxes, shared semaphores, |
| arbitrated semaphores and doorbells. |
| |
| Required properties: |
| - name : Should be hsp |
| - compatible |
| Array of strings. |
| one of: |
| - "nvidia,tegra186-hsp" |
| - reg : Offset and length of the register set for the device. |
| - interrupt-names |
| Array of strings. |
| Contains a list of names for the interrupts described by the interrupt |
| property. May contain the following entries, in any order: |
| - "doorbell" |
| Users of this binding MUST look up entries in the interrupt property |
| by name, using this interrupt-names property to do so. |
| - interrupts |
| Array of interrupt specifiers. |
| Must contain one entry per entry in the interrupt-names property, |
| in a matching order. |
| - #mbox-cells : Should be 2. |
| |
| The mbox specifier of the "mboxes" property in the client node should |
| contain two data. The first one should be the HSP type and the second |
| one should be the ID that the client is going to use. Those information |
| can be found in the following file. |
| |
| - <dt-bindings/mailbox/tegra186-hsp.h>. |
| |
| Example: |
| |
| hsp_top0: hsp@3c00000 { |
| compatible = "nvidia,tegra186-hsp"; |
| reg = <0x0 0x03c00000 0x0 0xa0000>; |
| interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-names = "doorbell"; |
| #mbox-cells = <2>; |
| }; |
| |
| client { |
| ... |
| mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB TEGRA_HSP_DB_MASTER_XXX>; |
| }; |