| /* | 
 |  * Device Tree Source for OMAP243x SoC | 
 |  * | 
 |  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | 
 |  * | 
 |  * This file is licensed under the terms of the GNU General Public License | 
 |  * version 2.  This program is licensed "as is" without any warranty of any | 
 |  * kind, whether express or implied. | 
 |  */ | 
 |  | 
 | #include "omap2.dtsi" | 
 |  | 
 | / { | 
 | 	compatible = "ti,omap2430", "ti,omap2"; | 
 |  | 
 | 	ocp { | 
 | 		counter32k: counter@49020000 { | 
 | 			compatible = "ti,omap-counter32k"; | 
 | 			reg = <0x49020000 0x20>; | 
 | 			ti,hwmods = "counter_32k"; | 
 | 		}; | 
 |  | 
 | 		omap2430_pmx: pinmux@49002030 { | 
 | 			compatible = "ti,omap2430-padconf", "pinctrl-single"; | 
 | 			reg = <0x49002030 0x0154>; | 
 | 			#address-cells = <1>; | 
 | 			#size-cells = <0>; | 
 | 			pinctrl-single,register-width = <8>; | 
 | 			pinctrl-single,function-mask = <0x3f>; | 
 | 		}; | 
 |  | 
 | 		gpio1: gpio@4900c000 { | 
 | 			compatible = "ti,omap2-gpio"; | 
 | 			reg = <0x4900c000 0x200>; | 
 | 			interrupts = <29>; | 
 | 			ti,hwmods = "gpio1"; | 
 | 			ti,gpio-always-on; | 
 | 			#gpio-cells = <2>; | 
 | 			gpio-controller; | 
 | 			#interrupt-cells = <2>; | 
 | 			interrupt-controller; | 
 | 		}; | 
 |  | 
 | 		gpio2: gpio@4900e000 { | 
 | 			compatible = "ti,omap2-gpio"; | 
 | 			reg = <0x4900e000 0x200>; | 
 | 			interrupts = <30>; | 
 | 			ti,hwmods = "gpio2"; | 
 | 			ti,gpio-always-on; | 
 | 			#gpio-cells = <2>; | 
 | 			gpio-controller; | 
 | 			#interrupt-cells = <2>; | 
 | 			interrupt-controller; | 
 | 		}; | 
 |  | 
 | 		gpio3: gpio@49010000 { | 
 | 			compatible = "ti,omap2-gpio"; | 
 | 			reg = <0x49010000 0x200>; | 
 | 			interrupts = <31>; | 
 | 			ti,hwmods = "gpio3"; | 
 | 			ti,gpio-always-on; | 
 | 			#gpio-cells = <2>; | 
 | 			gpio-controller; | 
 | 			#interrupt-cells = <2>; | 
 | 			interrupt-controller; | 
 | 		}; | 
 |  | 
 | 		gpio4: gpio@49012000 { | 
 | 			compatible = "ti,omap2-gpio"; | 
 | 			reg = <0x49012000 0x200>; | 
 | 			interrupts = <32>; | 
 | 			ti,hwmods = "gpio4"; | 
 | 			ti,gpio-always-on; | 
 | 			#gpio-cells = <2>; | 
 | 			gpio-controller; | 
 | 			#interrupt-cells = <2>; | 
 | 			interrupt-controller; | 
 | 		}; | 
 |  | 
 | 		gpio5: gpio@480b6000 { | 
 | 			compatible = "ti,omap2-gpio"; | 
 | 			reg = <0x480b6000 0x200>; | 
 | 			interrupts = <33>; | 
 | 			ti,hwmods = "gpio5"; | 
 | 			#gpio-cells = <2>; | 
 | 			gpio-controller; | 
 | 			#interrupt-cells = <2>; | 
 | 			interrupt-controller; | 
 | 		}; | 
 |  | 
 | 		gpmc: gpmc@6e000000 { | 
 | 			compatible = "ti,omap2430-gpmc"; | 
 | 			reg = <0x6e000000 0x1000>; | 
 | 			#address-cells = <2>; | 
 | 			#size-cells = <1>; | 
 | 			interrupts = <20>; | 
 | 			gpmc,num-cs = <8>; | 
 | 			gpmc,num-waitpins = <4>; | 
 | 			ti,hwmods = "gpmc"; | 
 | 		}; | 
 |  | 
 | 		mcbsp1: mcbsp@48074000 { | 
 | 			compatible = "ti,omap2430-mcbsp"; | 
 | 			reg = <0x48074000 0xff>; | 
 | 			reg-names = "mpu"; | 
 | 			interrupts = <64>, /* OCP compliant interrupt */ | 
 | 				     <59>, /* TX interrupt */ | 
 | 				     <60>, /* RX interrupt */ | 
 | 				     <61>; /* RX overflow interrupt */ | 
 | 			interrupt-names = "common", "tx", "rx", "rx_overflow"; | 
 | 			ti,buffer-size = <128>; | 
 | 			ti,hwmods = "mcbsp1"; | 
 | 			dmas = <&sdma 31>, | 
 | 			       <&sdma 32>; | 
 | 			dma-names = "tx", "rx"; | 
 | 		}; | 
 |  | 
 | 		mcbsp2: mcbsp@48076000 { | 
 | 			compatible = "ti,omap2430-mcbsp"; | 
 | 			reg = <0x48076000 0xff>; | 
 | 			reg-names = "mpu"; | 
 | 			interrupts = <16>, /* OCP compliant interrupt */ | 
 | 				     <62>, /* TX interrupt */ | 
 | 				     <63>; /* RX interrupt */ | 
 | 			interrupt-names = "common", "tx", "rx"; | 
 | 			ti,buffer-size = <128>; | 
 | 			ti,hwmods = "mcbsp2"; | 
 | 			dmas = <&sdma 33>, | 
 | 			       <&sdma 34>; | 
 | 			dma-names = "tx", "rx"; | 
 | 		}; | 
 |  | 
 | 		mcbsp3: mcbsp@4808c000 { | 
 | 			compatible = "ti,omap2430-mcbsp"; | 
 | 			reg = <0x4808c000 0xff>; | 
 | 			reg-names = "mpu"; | 
 | 			interrupts = <17>, /* OCP compliant interrupt */ | 
 | 				     <89>, /* TX interrupt */ | 
 | 				     <90>; /* RX interrupt */ | 
 | 			interrupt-names = "common", "tx", "rx"; | 
 | 			ti,buffer-size = <128>; | 
 | 			ti,hwmods = "mcbsp3"; | 
 | 			dmas = <&sdma 17>, | 
 | 			       <&sdma 18>; | 
 | 			dma-names = "tx", "rx"; | 
 | 		}; | 
 |  | 
 | 		mcbsp4: mcbsp@4808e000 { | 
 | 			compatible = "ti,omap2430-mcbsp"; | 
 | 			reg = <0x4808e000 0xff>; | 
 | 			reg-names = "mpu"; | 
 | 			interrupts = <18>, /* OCP compliant interrupt */ | 
 | 				     <54>, /* TX interrupt */ | 
 | 				     <55>; /* RX interrupt */ | 
 | 			interrupt-names = "common", "tx", "rx"; | 
 | 			ti,buffer-size = <128>; | 
 | 			ti,hwmods = "mcbsp4"; | 
 | 			dmas = <&sdma 19>, | 
 | 			       <&sdma 20>; | 
 | 			dma-names = "tx", "rx"; | 
 | 		}; | 
 |  | 
 | 		mcbsp5: mcbsp@48096000 { | 
 | 			compatible = "ti,omap2430-mcbsp"; | 
 | 			reg = <0x48096000 0xff>; | 
 | 			reg-names = "mpu"; | 
 | 			interrupts = <19>, /* OCP compliant interrupt */ | 
 | 				     <81>, /* TX interrupt */ | 
 | 				     <82>; /* RX interrupt */ | 
 | 			interrupt-names = "common", "tx", "rx"; | 
 | 			ti,buffer-size = <128>; | 
 | 			ti,hwmods = "mcbsp5"; | 
 | 			dmas = <&sdma 21>, | 
 | 			       <&sdma 22>; | 
 | 			dma-names = "tx", "rx"; | 
 | 		}; | 
 |  | 
 | 		timer1: timer@49018000 { | 
 | 			compatible = "ti,omap2420-timer"; | 
 | 			reg = <0x49018000 0x400>; | 
 | 			interrupts = <37>; | 
 | 			ti,hwmods = "timer1"; | 
 | 			ti,timer-alwon; | 
 | 		}; | 
 | 	}; | 
 | }; |