| // SPDX-License-Identifier: GPL-2.0 |
| /* |
| * Copyright (c) 2019 BayLibre, SAS. |
| * Author: Fabien Parent <fparent@baylibre.com> |
| */ |
| |
| #include <dt-bindings/gpio/gpio.h> |
| |
| #include "mt6392.dtsi" |
| |
| / { |
| aliases { |
| ethernet0 = ðernet; |
| ethernet1 = &wifi; |
| ethernet2 = &bluetooth; |
| serial0 = &uart0; |
| }; |
| |
| chosen { |
| stdout-path = "serial0:921600n8"; |
| }; |
| |
| firmware { |
| optee: optee@4fd00000 { |
| compatible = "linaro,optee-tz"; |
| method = "smc"; |
| }; |
| }; |
| |
| gpio-keys { |
| compatible = "gpio-keys"; |
| input-name = "gpio-keys"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&gpio_keys_default>; |
| |
| volume-up { |
| gpios = <&pio 42 GPIO_ACTIVE_LOW>; |
| label = "volume_up"; |
| linux,code = <115>; |
| wakeup-source; |
| debounce-interval = <15>; |
| }; |
| |
| volume-down { |
| gpios = <&pio 43 GPIO_ACTIVE_LOW>; |
| label = "volume_down"; |
| linux,code = <114>; |
| wakeup-source; |
| debounce-interval = <15>; |
| }; |
| }; |
| |
| |
| mt8167_audio_codec: mt8167_audio_codec { |
| compatible = "mediatek,mt8167-codec"; |
| clocks = <&topckgen CLK_TOP_AUDIO>; |
| clock-names = "bus"; |
| mediatek,afe-regmap = <&afe>; |
| mediatek,apmixedsys-regmap = <&apmixedsys>; |
| mediatek,pwrap-regmap = <&pwrap>; |
| mediatek,speaker-mode = <0>; /* 0(CLASSD) 1(CLASSAB) */ |
| mediatek,dmic-wire-mode = <1>; /* 0(ONE_WIRE) 1(TWO_WIRE) */ |
| }; |
| |
| sound: sound { |
| compatible = "mediatek,mt8516-soc-pumpkin"; |
| mediatek,platform = <&afe>; |
| mediatek,audio-codec = <&mt8167_audio_codec>; |
| status = "okay"; |
| }; |
| }; |
| |
| &cpu0 { |
| proc-supply = <&mt6392_vproc_reg>; |
| }; |
| |
| &cpu1 { |
| proc-supply = <&mt6392_vproc_reg>; |
| }; |
| |
| &cpu2 { |
| proc-supply = <&mt6392_vproc_reg>; |
| }; |
| |
| &cpu3 { |
| proc-supply = <&mt6392_vproc_reg>; |
| }; |
| |
| &i2c0 { |
| clock-div = <2>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c0_pins_a>; |
| status = "okay"; |
| |
| tca6416: gpio@20 { |
| compatible = "ti,tca6416"; |
| reg = <0x20>; |
| rst-gpio = <&pio 65 GPIO_ACTIVE_HIGH>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&tca6416_pins>; |
| |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| eint20_mux_sel0 { |
| gpio-hog; |
| gpios = <0 0>; |
| input; |
| line-name = "eint20_mux_sel0"; |
| }; |
| |
| expcon_mux_sel1 { |
| gpio-hog; |
| gpios = <1 0>; |
| input; |
| line-name = "expcon_mux_sel1"; |
| }; |
| |
| mrg_di_mux_sel2 { |
| gpio-hog; |
| gpios = <2 0>; |
| input; |
| line-name = "mrg_di_mux_sel2"; |
| }; |
| |
| sd_sdio_mux_sel3 { |
| gpio-hog; |
| gpios = <3 0>; |
| input; |
| line-name = "sd_sdio_mux_sel3"; |
| }; |
| |
| sd_sdio_mux_ctrl7 { |
| gpio-hog; |
| gpios = <7 0>; |
| output-low; |
| line-name = "sd_sdio_mux_ctrl7"; |
| }; |
| |
| hw_id0 { |
| gpio-hog; |
| gpios = <8 0>; |
| input; |
| line-name = "hw_id0"; |
| }; |
| |
| hw_id1 { |
| gpio-hog; |
| gpios = <9 0>; |
| input; |
| line-name = "hw_id1"; |
| }; |
| |
| hw_id2 { |
| gpio-hog; |
| gpios = <10 0>; |
| input; |
| line-name = "hw_id2"; |
| }; |
| |
| fg_int_n { |
| gpio-hog; |
| gpios = <11 0>; |
| input; |
| line-name = "fg_int_n"; |
| }; |
| |
| usba_pwr_en { |
| gpio-hog; |
| gpios = <12 0>; |
| output-high; |
| line-name = "usba_pwr_en"; |
| }; |
| |
| wifi_3v3_pg { |
| gpio-hog; |
| gpios = <13 0>; |
| input; |
| line-name = "wifi_3v3_pg"; |
| }; |
| |
| cam_rst { |
| gpio-hog; |
| gpios = <14 0>; |
| output-low; |
| line-name = "cam_rst"; |
| }; |
| |
| cam_pwdn { |
| gpio-hog; |
| gpios = <15 0>; |
| output-low; |
| line-name = "cam_pwdn"; |
| }; |
| }; |
| }; |
| |
| &i2c2 { |
| clock-div = <2>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c2_pins_a>; |
| status = "okay"; |
| }; |
| |
| &mt6392_pmic { |
| interrupt-parent = <&pio>; |
| interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| |
| &uart0 { |
| status = "okay"; |
| }; |
| |
| &pio { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&state_default>; |
| |
| state_default:pinconf_default { |
| }; |
| |
| gpio_keys_default: gpiodefault { |
| pins_cmd_dat { |
| pinmux = <MT8516_PIN_42_KPCOL0__FUNC_GPIO42>, |
| <MT8516_PIN_43_KPCOL1__FUNC_GPIO43>; |
| bias-pull-up; |
| input-enable; |
| }; |
| }; |
| |
| i2c0_pins_a: i2c0@0 { |
| pins1 { |
| pinmux = <MT8516_PIN_58_SDA0__FUNC_SDA0_0>, |
| <MT8516_PIN_59_SCL0__FUNC_SCL0_0>; |
| bias-disable; |
| }; |
| }; |
| |
| |
| tca6416_pins: pinmux_tca6416_pins { |
| gpio_mux_rst_n_pin { |
| pinmux = <MT8516_PIN_65_UTXD1__FUNC_GPIO65>; |
| output-high; |
| }; |
| |
| gpio_mux_int_n_pin { |
| pinmux = <MT8516_PIN_64_URXD1__FUNC_GPIO64>; |
| input-enable; |
| bias-pull-up; |
| }; |
| }; |
| |
| mmc1_pins_default: mmc1default { |
| pins_cmd_dat { |
| pinmux = <MT8516_PIN_106_MSDC1_DAT0__FUNC_MSDC1_DAT0>, |
| <MT8516_PIN_107_MSDC1_DAT1__FUNC_MSDC1_DAT1>, |
| <MT8516_PIN_108_MSDC1_DAT2__FUNC_MSDC1_DAT2>, |
| <MT8516_PIN_109_MSDC1_DAT3__FUNC_MSDC1_DAT3>, |
| <MT8516_PIN_104_MSDC1_CMD__FUNC_MSDC1_CMD>; |
| input-enable; |
| drive-strength = <MTK_DRIVE_6mA>; |
| bias-pull-up = <MTK_PUPD_SET_R1R0_01>; |
| }; |
| |
| pins_clk { |
| pinmux = <MT8516_PIN_105_MSDC1_CLK__FUNC_MSDC1_CLK>; |
| drive-strength = <MTK_DRIVE_6mA>; |
| bias-pull-down = <MTK_PUPD_SET_R1R0_10>; |
| }; |
| |
| pins_wifi_pwr_en { |
| pinmux = <MT8516_PIN_41_KPROW1__FUNC_GPIO41>; |
| output-low; |
| }; |
| |
| pins_pmu_en { |
| pinmux = <MT8516_PIN_40_KPROW0__FUNC_GPIO40>; |
| output-low; |
| }; |
| }; |
| |
| mmc1_pins_uhs: mmc1@0 { |
| pins_cmd_dat { |
| pinmux = <MT8516_PIN_106_MSDC1_DAT0__FUNC_MSDC1_DAT0>, |
| <MT8516_PIN_107_MSDC1_DAT1__FUNC_MSDC1_DAT1>, |
| <MT8516_PIN_108_MSDC1_DAT2__FUNC_MSDC1_DAT2>, |
| <MT8516_PIN_109_MSDC1_DAT3__FUNC_MSDC1_DAT3>, |
| <MT8516_PIN_104_MSDC1_CMD__FUNC_MSDC1_CMD>; |
| input-enable; |
| drive-strength = <MTK_DRIVE_6mA>; |
| bias-pull-up = <MTK_PUPD_SET_R1R0_01>; |
| }; |
| |
| pins_clk { |
| pinmux = <MT8516_PIN_105_MSDC1_CLK__FUNC_MSDC1_CLK>; |
| drive-strength = <MTK_DRIVE_8mA>; |
| bias-pull-down = <MTK_PUPD_SET_R1R0_10>; |
| }; |
| |
| |
| pins_wifi_pwr_en { |
| pinmux = <MT8516_PIN_41_KPROW1__FUNC_GPIO41>; |
| output-high; |
| }; |
| |
| pins_pmu_en { |
| pinmux = <MT8516_PIN_40_KPROW0__FUNC_GPIO40>; |
| output-high; |
| }; |
| }; |
| |
| mmc2_pins_default: mmc2default { |
| pins_cmd_dat { |
| pinmux = <MT8516_PIN_70_MSDC2_DAT0__FUNC_MSDC2_DAT0>, |
| <MT8516_PIN_71_MSDC2_DAT1__FUNC_MSDC2_DAT1>, |
| <MT8516_PIN_72_MSDC2_DAT2__FUNC_MSDC2_DAT2>, |
| <MT8516_PIN_73_MSDC2_DAT3__FUNC_MSDC2_DAT3>, |
| <MT8516_PIN_68_MSDC2_CMD__FUNC_MSDC2_CMD>; |
| input-enable; |
| bias-pull-up = <MTK_PUPD_SET_R1R0_01>; |
| }; |
| |
| pins_clk { |
| pinmux = <MT8516_PIN_69_MSDC2_CLK__FUNC_MSDC2_CLK>; |
| bias-pull-down = <MTK_PUPD_SET_R1R0_10>; |
| }; |
| |
| pin_cd { |
| pinmux = <MT8516_PIN_4_EINT4__FUNC_GPIO4>; |
| bias-pull-up; |
| }; |
| }; |
| |
| mmc2_pins_uhs: mmc2@0 { |
| pins_cmd_dat { |
| pinmux = <MT8516_PIN_70_MSDC2_DAT0__FUNC_MSDC2_DAT0>, |
| <MT8516_PIN_71_MSDC2_DAT1__FUNC_MSDC2_DAT1>, |
| <MT8516_PIN_72_MSDC2_DAT2__FUNC_MSDC2_DAT2>, |
| <MT8516_PIN_73_MSDC2_DAT3__FUNC_MSDC2_DAT3>, |
| <MT8516_PIN_68_MSDC2_CMD__FUNC_MSDC2_CMD>; |
| input-enable; |
| drive-strength = <MTK_DRIVE_6mA>; |
| bias-pull-up = <MTK_PUPD_SET_R1R0_01>; |
| }; |
| |
| pins_clk { |
| pinmux = <MT8516_PIN_69_MSDC2_CLK__FUNC_MSDC2_CLK>; |
| drive-strength = <MTK_DRIVE_8mA>; |
| bias-pull-down = <MTK_PUPD_SET_R1R0_10>; |
| }; |
| }; |
| |
| ethernet_pins_default: ethernet { |
| pins_ethernet { |
| pinmux = <MT8516_PIN_0_EINT0__FUNC_EXT_TXD0>, |
| <MT8516_PIN_1_EINT1__FUNC_EXT_TXD1>, |
| <MT8516_PIN_5_EINT5__FUNC_EXT_RXER>, |
| <MT8516_PIN_6_EINT6__FUNC_EXT_RXC>, |
| <MT8516_PIN_7_EINT7__FUNC_EXT_RXDV>, |
| <MT8516_PIN_8_EINT8__FUNC_EXT_RXD0>, |
| <MT8516_PIN_9_EINT9__FUNC_EXT_RXD1>, |
| <MT8516_PIN_12_EINT12__FUNC_EXT_TXEN>, |
| <MT8516_PIN_38_MRG_DI__FUNC_EXT_MDIO>, |
| <MT8516_PIN_39_MRG_DO__FUNC_EXT_MDC>; |
| }; |
| }; |
| |
| usb1_default_pins: usb1_pins { |
| }; |
| |
| spi_pins_a: spi@0 { |
| pins1 { |
| pinmux = <MT8516_PIN_49_SPI_CK__FUNC_SPI_CLK>, |
| <MT8516_PIN_51_SPI_MO__FUNC_SPI_MO>; |
| bias-disable; |
| }; |
| }; |
| |
| i2c2_pins_a: i2c2@0 { |
| pins1 { |
| pinmux = <MT8516_PIN_60_SDA2__FUNC_SDA2_0>, |
| <MT8516_PIN_61_SCL2__FUNC_SCL2_0>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| &mmc1 { |
| pinctrl-names = "default", "state_uhs"; |
| pinctrl-0 = <&mmc1_pins_default>; |
| pinctrl-1 = <&mmc1_pins_uhs>; |
| bus-width = <4>; |
| max-frequency = <200000000>; |
| cap-sd-highspeed; |
| sd-uhs-sdr50; |
| sd-uhs-sdr104; |
| keep-power-in-suspend; |
| enable-sdio-wakeup; |
| cap-sdio-irq; |
| vmmc-supply = <&mt6392_vemc3v3_reg>; |
| vqmmc-supply = <&mt6392_vio18_reg>; |
| non-removable; |
| status = "okay"; |
| |
| mt7668 { |
| wifi: mt7668-wifi@0 { |
| compatible = "mediatek,mt8516-wifi", |
| "mediatek,mt7668-wifi"; |
| mac-address = [00 00 00 00 00 00]; |
| }; |
| |
| bluetooth: mt7668-bluetooth@0 { |
| compatible = "mediatek,mt8516-bluetooth", |
| "mediatek,mt7668-bluetooth"; |
| mac-address = [00 00 00 00 00 00]; |
| }; |
| }; |
| }; |
| |
| &mmc2 { |
| pinctrl-names = "default", "state_uhs"; |
| pinctrl-0 = <&mmc2_pins_default>; |
| pinctrl-1 = <&mmc2_pins_uhs>; |
| cd-gpios = <&pio 4 GPIO_ACTIVE_HIGH>; |
| bus-width = <4>; |
| max-frequency = <200000000>; |
| cap-sd-highspeed; |
| sd-uhs-sdr50; |
| sd-uhs-sdr104; |
| vmmc-supply = <&mt6392_vmch_reg>; |
| vqmmc-supply = <&mt6392_vio18_reg>; |
| // vqmmc-supply = <&mt6392_vmc_reg>; |
| status = "okay"; |
| }; |
| |
| ðernet { |
| pinctrl-names = "default"; |
| pinctrl-0 = <ðernet_pins_default>; |
| eth-gpios = <&pio 13 GPIO_ACTIVE_HIGH>; |
| eth-regulator-supply = <&mt6392_vmch_reg>; |
| mac-address = [00 00 00 00 00 00]; |
| status = "okay"; |
| }; |
| |
| &usb0 { |
| status = "okay"; |
| dr_mode = "peripheral"; |
| |
| usb_con: connector { |
| compatible = "usb-c-connector"; |
| label = "USB-C"; |
| }; |
| }; |
| |
| &usb0_phy { |
| status = "okay"; |
| }; |
| |
| &usb1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&usb1_default_pins>; |
| status = "okay"; |
| }; |
| |
| &afe { |
| /* 0(HDMI) 1(I2S) 2(TDM) */ |
| mediatek,tdm-out-mode = <1>; |
| /* 0(IR1) 1(IRQ2) 4(IRQ7)*/ |
| mediatek,awb-irq-mode = <4>; |
| /*0(Spearated Mode) 1(Share Mode)*/ |
| mediatek,i2s-clock-modes = <1 1>; |
| }; |
| |
| &spi { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spi_pins_a>; |
| }; |