| Cirrus Logic CS4271 DT bindings |
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| This driver supports both the I2C and the SPI bus. |
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| Required properties: |
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| - compatible: "cirrus,cs4271" |
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| For required properties on SPI, please consult |
| Documentation/devicetree/bindings/spi/spi-bus.txt |
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| Required properties on I2C: |
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| - reg: the i2c address |
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| Optional properties: |
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| - reset-gpio: a GPIO spec to define which pin is connected to the chip's |
| !RESET pin |
| - cirrus,amuteb-eq-bmutec: When given, the Codec's AMUTEB=BMUTEC flag |
| is enabled. |
| - cirrus,enable-soft-reset: |
| The CS4271 requires its LRCLK and MCLK to be stable before its RESET |
| line is de-asserted. That also means that clocks cannot be changed |
| without putting the chip back into hardware reset, which also requires |
| a complete re-initialization of all registers. |
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| One (undocumented) workaround is to assert and de-assert the PDN bit |
| in the MODE2 register. This workaround can be enabled with this DT |
| property. |
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| Note that this is not needed in case the clocks are stable |
| throughout the entire runtime of the codec. |
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| - vd-supply: Digital power |
| - vl-supply: Logic power |
| - va-supply: Analog Power |
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| Examples: |
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| codec_i2c: cs4271@10 { |
| compatible = "cirrus,cs4271"; |
| reg = <0x10>; |
| reset-gpio = <&gpio 23 0>; |
| vd-supply = <&vdd_3v3_reg>; |
| vl-supply = <&vdd_3v3_reg>; |
| va-supply = <&vdd_3v3_reg>; |
| }; |
| |
| codec_spi: cs4271@0 { |
| compatible = "cirrus,cs4271"; |
| reg = <0x0>; |
| reset-gpio = <&gpio 23 0>; |
| spi-max-frequency = <6000000>; |
| }; |
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