| * Renesas R9A06G032 SYSCTRL |
| |
| Required Properties: |
| |
| - compatible: Must be: |
| - "renesas,r9a06g032-sysctrl" |
| - reg: Base address and length of the SYSCTRL IO block. |
| - #clock-cells: Must be 1 |
| - clocks: References to the parent clocks: |
| - external 40mhz crystal. |
| - external (optional) 32.768khz |
| - external (optional) jtag input |
| - external (optional) RGMII_REFCLK |
| - clock-names: Must be: |
| clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext"; |
| |
| Examples |
| -------- |
| |
| - SYSCTRL node: |
| |
| sysctrl: system-controller@4000c000 { |
| compatible = "renesas,r9a06g032-sysctrl"; |
| reg = <0x4000c000 0x1000>; |
| #clock-cells = <1>; |
| |
| clocks = <&ext_mclk>, <&ext_rtc_clk>, |
| <&ext_jtag_clk>, <&ext_rgmii_ref>; |
| clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext"; |
| }; |
| |
| - Other nodes can use the clocks provided by SYSCTRL as in: |
| |
| #include <dt-bindings/clock/r9a06g032-sysctrl.h> |
| uart0: serial@40060000 { |
| compatible = "snps,dw-apb-uart"; |
| reg = <0x40060000 0x400>; |
| interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; |
| reg-shift = <2>; |
| reg-io-width = <4>; |
| clocks = <&sysctrl R9A06G032_CLK_UART0>; |
| clock-names = "baudclk"; |
| }; |
