drivers/mfd/mt6397-core.c - linux-mtk - Git at Google

 /*
  * Copyright (c) 2014 MediaTek Inc.
  * Author: Flora Fu, MediaTek
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  */

 #include <linux/module.h>
 #include <linux/of_device.h>
 #include <linux/of_irq.h>
 #include <linux/regmap.h>
 #include <linux/mfd/core.h>
 #include <linux/mfd/mt6323/core.h>
 #include <linux/mfd/mt6358/core.h>
 #include <linux/mfd/mt6392/core.h>
 #include <linux/mfd/mt6397/core.h>
 #include <linux/mfd/mt6323/registers.h>
 #include <linux/mfd/mt6358/registers.h>
 #include <linux/mfd/mt6392/registers.h>
 #include <linux/mfd/mt6397/registers.h>

 #define MT6358_RTC_BASE		0x0588
 #define MT6358_RTC_SIZE		0x3c
 #define MT6358_RTC_WRTGR_OFFSET	0x3a
 #define MT6392_RTC_BASE		0x8000
 #define MT6392_RTC_SIZE		0x3e
 #define MT6397_RTC_BASE		0xe000
 #define MT6397_RTC_SIZE		0x3e
 #define MT6397_RTC_WRTGR_OFFSET	0x3c

 static const struct resource mt6358_rtc_resources[] = {
 	{
 		.start = MT6358_RTC_BASE,
 		.end   = MT6358_RTC_BASE + MT6358_RTC_SIZE,
 		.flags = IORESOURCE_MEM,
 	},
 	{
 		.start = MT6358_IRQ_RTC,
 		.end   = MT6358_IRQ_RTC,
 		.flags = IORESOURCE_IRQ,
 	},
 	{
 		.start = MT6358_RTC_WRTGR_OFFSET,
 		.end   = MT6358_RTC_WRTGR_OFFSET,
 		.flags = IORESOURCE_REG,
 	},
 };

 static const struct resource mt6392_rtc_resources[] = {
 	DEFINE_RES_MEM(MT6392_RTC_BASE, MT6392_RTC_SIZE),
 	DEFINE_RES_IRQ(MT6392_IRQ_RTC),
 };

 static const struct resource mt6397_rtc_resources[] = {
 	{
 		.start = MT6397_RTC_BASE,
 		.end   = MT6397_RTC_BASE + MT6397_RTC_SIZE,
 		.flags = IORESOURCE_MEM,
 	},
 	{
 		.start = MT6397_IRQ_RTC,
 		.end   = MT6397_IRQ_RTC,
 		.flags = IORESOURCE_IRQ,
 	},
 	{
 		.start = MT6397_RTC_WRTGR_OFFSET,
 		.end   = MT6397_RTC_WRTGR_OFFSET,
 		.flags = IORESOURCE_REG,
 	},
 };

 static const struct resource mt6323_keys_resources[] = {
 	DEFINE_RES_IRQ(MT6323_IRQ_STATUS_PWRKEY),
 	DEFINE_RES_IRQ(MT6323_IRQ_STATUS_FCHRKEY),
 };

 static const struct resource mt6392_keys_resources[] = {
 	DEFINE_RES_IRQ(MT6392_IRQ_PWRKEY),
 	DEFINE_RES_IRQ(MT6392_IRQ_FCHRKEY),
 };

 static const struct resource mt6397_keys_resources[] = {
 	DEFINE_RES_IRQ(MT6397_IRQ_PWRKEY),
 	DEFINE_RES_IRQ(MT6397_IRQ_HOMEKEY),
 };

 static const struct mfd_cell mt6392_devs[] = {
 	{
 		.name = "mt6392-regulator",
 		.of_compatible = "mediatek,mt6392-regulator",
 	}, {
 		.name = "mt6397-rtc",
 		.num_resources = ARRAY_SIZE(mt6392_rtc_resources),
 		.resources = mt6392_rtc_resources,
 		.of_compatible = "mediatek,mt6392-rtc",
 	}, {
 		.name = "mtk-pmic-keys",
 		.num_resources = ARRAY_SIZE(mt6392_keys_resources),
 		.resources = mt6392_keys_resources,
 		.of_compatible = "mediatek,mt6392-keys"
 	},
 };

 static const struct mfd_cell mt6323_devs[] = {
 	{
 		.name = "mt6323-regulator",
 		.of_compatible = "mediatek,mt6323-regulator"
 	}, {
 		.name = "mt6323-led",
 		.of_compatible = "mediatek,mt6323-led"
 	}, {
 		.name = "mtk-pmic-keys",
 		.num_resources = ARRAY_SIZE(mt6323_keys_resources),
 		.resources = mt6323_keys_resources,
 		.of_compatible = "mediatek,mt6323-keys"
 	},
 };

 static const struct mfd_cell mt6358_devs[] = {
 	{
 		.name = "mt6358-regulator",
 		.of_compatible = "mediatek,mt6358-regulator"
 	}, {
 		.name = "mt6397-rtc",
 		.num_resources = ARRAY_SIZE(mt6358_rtc_resources),
 		.resources = mt6358_rtc_resources,
 		.of_compatible = "mediatek,mt6358-rtc",
 	}, {
 		.name = "mt6358-sound",
 		.of_compatible = "mediatek,mt6358-sound"
 	},
 };

 static const struct mfd_cell mt6397_devs[] = {
 	{
 		.name = "mt6397-rtc",
 		.num_resources = ARRAY_SIZE(mt6397_rtc_resources),
 		.resources = mt6397_rtc_resources,
 		.of_compatible = "mediatek,mt6397-rtc",
 	}, {
 		.name = "mt6397-regulator",
 		.of_compatible = "mediatek,mt6397-regulator",
 	}, {
 		.name = "mt6397-codec",
 		.of_compatible = "mediatek,mt6397-codec",
 	}, {
 		.name = "mt6397-clk",
 		.of_compatible = "mediatek,mt6397-clk",
 	}, {
 		.name = "mt6397-pinctrl",
 		.of_compatible = "mediatek,mt6397-pinctrl",
 	}, {
 		.name = "mtk-pmic-keys",
 		.num_resources = ARRAY_SIZE(mt6397_keys_resources),
 		.resources = mt6397_keys_resources,
 		.of_compatible = "mediatek,mt6397-keys"
 	}
 };

 struct chip_data {
 	u32 cid_addr;
 	u32 cid_shift;
 };

 static const struct chip_data mt6323_core = {
 	.cid_addr = MT6323_CID,
 	.cid_shift = 0,
 };

 static const struct chip_data mt6358_core = {
 	.cid_addr = MT6358_SWCID,
 	.cid_shift = 8,
 };

 static const struct chip_data mt6392_core = {
 	.cid_addr = MT6392_CID,
 	.cid_shift = 0,
 };

 static const struct chip_data mt6397_core = {
 	.cid_addr = MT6397_CID,
 	.cid_shift = 0,
 };

 static int mt6397_probe(struct platform_device *pdev)
 {
 	int ret;
 	unsigned int id;
 	struct mt6397_chip *pmic;
 	const struct chip_data *pmic_core;

 	pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
 	if (!pmic)
 		return -ENOMEM;

 	pmic->dev = &pdev->dev;

 	/*
 	 * mt6397 MFD is child device of soc pmic wrapper.
 	 * Regmap is set from its parent.
 	 */
 	pmic->regmap = dev_get_regmap(pdev->dev.parent, NULL);
 	if (!pmic->regmap)
 		return -ENODEV;

 	pmic_core = of_device_get_match_data(&pdev->dev);
 	if (!pmic_core)
 		return -ENODEV;

 	ret = regmap_read(pmic->regmap, pmic_core->cid_addr, &id);
 	if (ret) {
 		dev_err(&pdev->dev, "Failed to read chip id: %d\n", ret);
 		return ret;
 	}

 	pmic->chip_id = (id >> pmic_core->cid_shift) & 0xff;

 	platform_set_drvdata(pdev, pmic);

 	pmic->irq = platform_get_irq(pdev, 0);
 	if (pmic->irq <= 0)
 		return pmic->irq;

 	if (pmic->chip_id == MT6358_CHIP_ID)
 		ret = mt6358_irq_init(pmic);
 	else
 		ret = mt6397_irq_init(pmic);

 	if (ret)
 		return ret;

 	switch (pmic->chip_id) {
 	case MT6323_CHIP_ID:
 		ret = devm_mfd_add_devices(&pdev->dev, -1, mt6323_devs,
 					   ARRAY_SIZE(mt6323_devs), NULL,
 					   0, pmic->irq_domain);
 		break;

 	case MT6358_CHIP_ID:
 		ret = devm_mfd_add_devices(&pdev->dev, -1, mt6358_devs,
 					   ARRAY_SIZE(mt6358_devs), NULL,
 					   0, pmic->irq_domain);
 		break;

 	case MT6391_CHIP_ID:
 	case MT6397_CHIP_ID:
 		ret = devm_mfd_add_devices(&pdev->dev, -1, mt6397_devs,
 					   ARRAY_SIZE(mt6397_devs), NULL,
 					   0, pmic->irq_domain);
 		break;

 	case MT6392_CHIP_ID:
 		ret = devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE,
 					   mt6392_devs, ARRAY_SIZE(mt6392_devs),
 					   NULL, 0, pmic->irq_domain);
 		break;

 	default:
 		dev_err(&pdev->dev, "unsupported chip: %d\n", pmic->chip_id);
 		return -ENODEV;
 	}

 	if (ret) {
 		irq_domain_remove(pmic->irq_domain);
 		dev_err(&pdev->dev, "failed to add child devices: %d\n", ret);
 	}

 	return ret;
 }

 static const struct of_device_id mt6397_of_match[] = {
 	{
 		.compatible = "mediatek,mt6323",
 		.data = &mt6323_core,
 	}, {
 		.compatible = "mediatek,mt6358",
 		.data = &mt6358_core,
 	}, {
 		.compatible = "mediatek,mt6392",
 		.data = &mt6392_core,
 	}, {
 		.compatible = "mediatek,mt6397",
 		.data = &mt6397_core,
 	}, {
 		/* sentinel */
 	}
 };
 MODULE_DEVICE_TABLE(of, mt6397_of_match);

 static const struct platform_device_id mt6397_id[] = {
 	{ "mt6397", 0 },
 	{ },
 };
 MODULE_DEVICE_TABLE(platform, mt6397_id);

 static struct platform_driver mt6397_driver = {
 	.probe = mt6397_probe,
 	.driver = {
 		.name = "mt6397",
 		.of_match_table = of_match_ptr(mt6397_of_match),
 	},
 	.id_table = mt6397_id,
 };

 module_platform_driver(mt6397_driver);

 MODULE_AUTHOR("Flora Fu, MediaTek");
 MODULE_DESCRIPTION("Driver for MediaTek MT6397 PMIC");
 MODULE_LICENSE("GPL");
	/*
	* Copyright (c) 2014 MediaTek Inc.
	* Author: Flora Fu, MediaTek
	*
	* This program is free software; you can redistribute it and/or modify
	* it under the terms of the GNU General Public License version 2 as
	* published by the Free Software Foundation.
	*
	* This program is distributed in the hope that it will be useful,
	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	* GNU General Public License for more details.
	*/

	#include <linux/module.h>
	#include <linux/of_device.h>
	#include <linux/of_irq.h>
	#include <linux/regmap.h>
	#include <linux/mfd/core.h>
	#include <linux/mfd/mt6323/core.h>
	#include <linux/mfd/mt6358/core.h>
	#include <linux/mfd/mt6392/core.h>
	#include <linux/mfd/mt6397/core.h>
	#include <linux/mfd/mt6323/registers.h>
	#include <linux/mfd/mt6358/registers.h>
	#include <linux/mfd/mt6392/registers.h>
	#include <linux/mfd/mt6397/registers.h>

	#define MT6358_RTC_BASE 0x0588
	#define MT6358_RTC_SIZE 0x3c
	#define MT6358_RTC_WRTGR_OFFSET 0x3a
	#define MT6392_RTC_BASE 0x8000
	#define MT6392_RTC_SIZE 0x3e
	#define MT6397_RTC_BASE 0xe000
	#define MT6397_RTC_SIZE 0x3e
	#define MT6397_RTC_WRTGR_OFFSET 0x3c

	static const struct resource mt6358_rtc_resources[] = {
	{
	.start = MT6358_RTC_BASE,
	.end = MT6358_RTC_BASE + MT6358_RTC_SIZE,
	.flags = IORESOURCE_MEM,
	},
	{
	.start = MT6358_IRQ_RTC,
	.end = MT6358_IRQ_RTC,
	.flags = IORESOURCE_IRQ,
	},
	{
	.start = MT6358_RTC_WRTGR_OFFSET,
	.end = MT6358_RTC_WRTGR_OFFSET,
	.flags = IORESOURCE_REG,
	},
	};

	static const struct resource mt6392_rtc_resources[] = {
	DEFINE_RES_MEM(MT6392_RTC_BASE, MT6392_RTC_SIZE),
	DEFINE_RES_IRQ(MT6392_IRQ_RTC),
	};

	static const struct resource mt6397_rtc_resources[] = {
	{
	.start = MT6397_RTC_BASE,
	.end = MT6397_RTC_BASE + MT6397_RTC_SIZE,
	.flags = IORESOURCE_MEM,
	},
	{
	.start = MT6397_IRQ_RTC,
	.end = MT6397_IRQ_RTC,
	.flags = IORESOURCE_IRQ,
	},
	{
	.start = MT6397_RTC_WRTGR_OFFSET,
	.end = MT6397_RTC_WRTGR_OFFSET,
	.flags = IORESOURCE_REG,
	},
	};

	static const struct resource mt6323_keys_resources[] = {
	DEFINE_RES_IRQ(MT6323_IRQ_STATUS_PWRKEY),
	DEFINE_RES_IRQ(MT6323_IRQ_STATUS_FCHRKEY),
	};

	static const struct resource mt6392_keys_resources[] = {
	DEFINE_RES_IRQ(MT6392_IRQ_PWRKEY),
	DEFINE_RES_IRQ(MT6392_IRQ_FCHRKEY),
	};

	static const struct resource mt6397_keys_resources[] = {
	DEFINE_RES_IRQ(MT6397_IRQ_PWRKEY),
	DEFINE_RES_IRQ(MT6397_IRQ_HOMEKEY),
	};

	static const struct mfd_cell mt6392_devs[] = {
	{
	.name = "mt6392-regulator",
	.of_compatible = "mediatek,mt6392-regulator",
	}, {
	.name = "mt6397-rtc",
	.num_resources = ARRAY_SIZE(mt6392_rtc_resources),
	.resources = mt6392_rtc_resources,
	.of_compatible = "mediatek,mt6392-rtc",
	}, {
	.name = "mtk-pmic-keys",
	.num_resources = ARRAY_SIZE(mt6392_keys_resources),
	.resources = mt6392_keys_resources,
	.of_compatible = "mediatek,mt6392-keys"
	},
	};

	static const struct mfd_cell mt6323_devs[] = {
	{
	.name = "mt6323-regulator",
	.of_compatible = "mediatek,mt6323-regulator"
	}, {
	.name = "mt6323-led",
	.of_compatible = "mediatek,mt6323-led"
	}, {
	.name = "mtk-pmic-keys",
	.num_resources = ARRAY_SIZE(mt6323_keys_resources),
	.resources = mt6323_keys_resources,
	.of_compatible = "mediatek,mt6323-keys"
	},
	};

	static const struct mfd_cell mt6358_devs[] = {
	{
	.name = "mt6358-regulator",
	.of_compatible = "mediatek,mt6358-regulator"
	}, {
	.name = "mt6397-rtc",
	.num_resources = ARRAY_SIZE(mt6358_rtc_resources),
	.resources = mt6358_rtc_resources,
	.of_compatible = "mediatek,mt6358-rtc",
	}, {
	.name = "mt6358-sound",
	.of_compatible = "mediatek,mt6358-sound"
	},
	};

	static const struct mfd_cell mt6397_devs[] = {
	{
	.name = "mt6397-rtc",
	.num_resources = ARRAY_SIZE(mt6397_rtc_resources),
	.resources = mt6397_rtc_resources,
	.of_compatible = "mediatek,mt6397-rtc",
	}, {
	.name = "mt6397-regulator",
	.of_compatible = "mediatek,mt6397-regulator",
	}, {
	.name = "mt6397-codec",
	.of_compatible = "mediatek,mt6397-codec",
	}, {
	.name = "mt6397-clk",
	.of_compatible = "mediatek,mt6397-clk",
	}, {
	.name = "mt6397-pinctrl",
	.of_compatible = "mediatek,mt6397-pinctrl",
	}, {
	.name = "mtk-pmic-keys",
	.num_resources = ARRAY_SIZE(mt6397_keys_resources),
	.resources = mt6397_keys_resources,
	.of_compatible = "mediatek,mt6397-keys"
	}
	};

	struct chip_data {
	u32 cid_addr;
	u32 cid_shift;
	};

	static const struct chip_data mt6323_core = {
	.cid_addr = MT6323_CID,
	.cid_shift = 0,
	};

	static const struct chip_data mt6358_core = {
	.cid_addr = MT6358_SWCID,
	.cid_shift = 8,
	};

	static const struct chip_data mt6392_core = {
	.cid_addr = MT6392_CID,
	.cid_shift = 0,
	};

	static const struct chip_data mt6397_core = {
	.cid_addr = MT6397_CID,
	.cid_shift = 0,
	};

	static int mt6397_probe(struct platform_device *pdev)
	{
	int ret;
	unsigned int id;
	struct mt6397_chip *pmic;
	const struct chip_data *pmic_core;

	pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
	if (!pmic)
	return -ENOMEM;

	pmic->dev = &pdev->dev;

	/*
	* mt6397 MFD is child device of soc pmic wrapper.
	* Regmap is set from its parent.
	*/
	pmic->regmap = dev_get_regmap(pdev->dev.parent, NULL);
	if (!pmic->regmap)
	return -ENODEV;

	pmic_core = of_device_get_match_data(&pdev->dev);
	if (!pmic_core)
	return -ENODEV;

	ret = regmap_read(pmic->regmap, pmic_core->cid_addr, &id);
	if (ret) {
	dev_err(&pdev->dev, "Failed to read chip id: %d\n", ret);
	return ret;
	}

	pmic->chip_id = (id >> pmic_core->cid_shift) & 0xff;

	platform_set_drvdata(pdev, pmic);

	pmic->irq = platform_get_irq(pdev, 0);
	if (pmic->irq <= 0)
	return pmic->irq;

	if (pmic->chip_id == MT6358_CHIP_ID)
	ret = mt6358_irq_init(pmic);
	else
	ret = mt6397_irq_init(pmic);

	if (ret)
	return ret;

	switch (pmic->chip_id) {
	case MT6323_CHIP_ID:
	ret = devm_mfd_add_devices(&pdev->dev, -1, mt6323_devs,
	ARRAY_SIZE(mt6323_devs), NULL,
	0, pmic->irq_domain);
	break;

	case MT6358_CHIP_ID:
	ret = devm_mfd_add_devices(&pdev->dev, -1, mt6358_devs,
	ARRAY_SIZE(mt6358_devs), NULL,
	0, pmic->irq_domain);
	break;

	case MT6391_CHIP_ID:
	case MT6397_CHIP_ID:
	ret = devm_mfd_add_devices(&pdev->dev, -1, mt6397_devs,
	ARRAY_SIZE(mt6397_devs), NULL,
	0, pmic->irq_domain);
	break;

	case MT6392_CHIP_ID:
	ret = devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE,
	mt6392_devs, ARRAY_SIZE(mt6392_devs),
	NULL, 0, pmic->irq_domain);
	break;

	default:
	dev_err(&pdev->dev, "unsupported chip: %d\n", pmic->chip_id);
	return -ENODEV;
	}

	if (ret) {
	irq_domain_remove(pmic->irq_domain);
	dev_err(&pdev->dev, "failed to add child devices: %d\n", ret);
	}

	return ret;
	}

	static const struct of_device_id mt6397_of_match[] = {
	{
	.compatible = "mediatek,mt6323",
	.data = &mt6323_core,
	}, {
	.compatible = "mediatek,mt6358",
	.data = &mt6358_core,
	}, {
	.compatible = "mediatek,mt6392",
	.data = &mt6392_core,
	}, {
	.compatible = "mediatek,mt6397",
	.data = &mt6397_core,
	}, {
	/* sentinel */
	}
	};
	MODULE_DEVICE_TABLE(of, mt6397_of_match);

	static const struct platform_device_id mt6397_id[] = {
	{ "mt6397", 0 },
	{ },
	};
	MODULE_DEVICE_TABLE(platform, mt6397_id);

	static struct platform_driver mt6397_driver = {
	.probe = mt6397_probe,
	.driver = {
	.name = "mt6397",
	.of_match_table = of_match_ptr(mt6397_of_match),
	},
	.id_table = mt6397_id,
	};

	module_platform_driver(mt6397_driver);

	MODULE_AUTHOR("Flora Fu, MediaTek");
	MODULE_DESCRIPTION("Driver for MediaTek MT6397 PMIC");
	MODULE_LICENSE("GPL");