| |
| * Samsung Exynos PPMU (Platform Performance Monitoring Unit) device |
| |
| The Samsung Exynos SoC has PPMU (Platform Performance Monitoring Unit) for |
| each IP. PPMU provides the primitive values to get performance data. These |
| PPMU events provide information of the SoC's behaviors so that you may |
| use to analyze system performance, to make behaviors visible and to count |
| usages of each IP (DMC, CPU, RIGHTBUS, LEFTBUS, CAM interface, LCD, G3D, MFC). |
| The Exynos PPMU driver uses the devfreq-event class to provide event data |
| to various devfreq devices. The devfreq devices would use the event data when |
| derterming the current state of each IP. |
| |
| Required properties: |
| - compatible: Should be "samsung,exynos-ppmu" or "samsung,exynos-ppmu-v2. |
| - reg: physical base address of each PPMU and length of memory mapped region. |
| |
| Optional properties: |
| - clock-names : the name of clock used by the PPMU, "ppmu" |
| - clocks : phandles for clock specified in "clock-names" property |
| |
| Example1 : PPMUv1 nodes in exynos3250.dtsi are listed below. |
| |
| ppmu_dmc0: ppmu_dmc0@106a0000 { |
| compatible = "samsung,exynos-ppmu"; |
| reg = <0x106a0000 0x2000>; |
| status = "disabled"; |
| }; |
| |
| ppmu_dmc1: ppmu_dmc1@106b0000 { |
| compatible = "samsung,exynos-ppmu"; |
| reg = <0x106b0000 0x2000>; |
| status = "disabled"; |
| }; |
| |
| ppmu_cpu: ppmu_cpu@106c0000 { |
| compatible = "samsung,exynos-ppmu"; |
| reg = <0x106c0000 0x2000>; |
| status = "disabled"; |
| }; |
| |
| ppmu_rightbus: ppmu_rightbus@112a0000 { |
| compatible = "samsung,exynos-ppmu"; |
| reg = <0x112a0000 0x2000>; |
| clocks = <&cmu CLK_PPMURIGHT>; |
| clock-names = "ppmu"; |
| status = "disabled"; |
| }; |
| |
| ppmu_leftbus: ppmu_leftbus0@116a0000 { |
| compatible = "samsung,exynos-ppmu"; |
| reg = <0x116a0000 0x2000>; |
| clocks = <&cmu CLK_PPMULEFT>; |
| clock-names = "ppmu"; |
| status = "disabled"; |
| }; |
| |
| Example2 : Events of each PPMU node in exynos3250-rinato.dts are listed below. |
| |
| &ppmu_dmc0 { |
| status = "okay"; |
| |
| events { |
| ppmu_dmc0_3: ppmu-event3-dmc0 { |
| event-name = "ppmu-event3-dmc0"; |
| }; |
| |
| ppmu_dmc0_2: ppmu-event2-dmc0 { |
| event-name = "ppmu-event2-dmc0"; |
| }; |
| |
| ppmu_dmc0_1: ppmu-event1-dmc0 { |
| event-name = "ppmu-event1-dmc0"; |
| }; |
| |
| ppmu_dmc0_0: ppmu-event0-dmc0 { |
| event-name = "ppmu-event0-dmc0"; |
| }; |
| }; |
| }; |
| |
| &ppmu_dmc1 { |
| status = "okay"; |
| |
| events { |
| ppmu_dmc1_3: ppmu-event3-dmc1 { |
| event-name = "ppmu-event3-dmc1"; |
| }; |
| }; |
| }; |
| |
| &ppmu_leftbus { |
| status = "okay"; |
| |
| events { |
| ppmu_leftbus_3: ppmu-event3-leftbus { |
| event-name = "ppmu-event3-leftbus"; |
| }; |
| }; |
| }; |
| |
| &ppmu_rightbus { |
| status = "okay"; |
| |
| events { |
| ppmu_rightbus_3: ppmu-event3-rightbus { |
| event-name = "ppmu-event3-rightbus"; |
| }; |
| }; |
| }; |
| |
| Example3 : PPMUv2 nodes in exynos5433.dtsi are listed below. |
| |
| ppmu_d0_cpu: ppmu_d0_cpu@10480000 { |
| compatible = "samsung,exynos-ppmu-v2"; |
| reg = <0x10480000 0x2000>; |
| status = "disabled"; |
| }; |
| |
| ppmu_d0_general: ppmu_d0_general@10490000 { |
| compatible = "samsung,exynos-ppmu-v2"; |
| reg = <0x10490000 0x2000>; |
| status = "disabled"; |
| }; |
| |
| ppmu_d0_rt: ppmu_d0_rt@104a0000 { |
| compatible = "samsung,exynos-ppmu-v2"; |
| reg = <0x104a0000 0x2000>; |
| status = "disabled"; |
| }; |
| |
| ppmu_d1_cpu: ppmu_d1_cpu@104b0000 { |
| compatible = "samsung,exynos-ppmu-v2"; |
| reg = <0x104b0000 0x2000>; |
| status = "disabled"; |
| }; |
| |
| ppmu_d1_general: ppmu_d1_general@104c0000 { |
| compatible = "samsung,exynos-ppmu-v2"; |
| reg = <0x104c0000 0x2000>; |
| status = "disabled"; |
| }; |
| |
| ppmu_d1_rt: ppmu_d1_rt@104d0000 { |
| compatible = "samsung,exynos-ppmu-v2"; |
| reg = <0x104d0000 0x2000>; |
| status = "disabled"; |
| }; |