Add device tree setup for mt8167-coral camera

- Add pinmux configs for camera interface and reset/power signals.
- Add block for ov5645 config
- Add block for mtk_mipicsi config

Change-Id: I01e194b5069107c14f2403de8e419afcc61fa7d0
diff --git a/arch/arm64/boot/dts/mediatek/mt8167-coral.dts b/arch/arm64/boot/dts/mediatek/mt8167-coral.dts
index 91cd660..31d27ec 100644
--- a/arch/arm64/boot/dts/mediatek/mt8167-coral.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8167-coral.dts
@@ -78,6 +78,12 @@
 		regulator-always-on;
 	};
 
+	cam_dummy_clk: cam_dummy_clk {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <24000000>;
+	};
+
 	mt8167_audio_codec: mt8167_audio_codec {
 		compatible = "mediatek,mt8167-codec";
 		status = "okay";
@@ -506,6 +512,41 @@
 		};
 	};
 	/* GA1600 GPIO end */
+
+	camera_pins_default: camdefault {
+		pins_cmd_dat {
+			pinmux = <MT8167_PIN_84_RDN0__FUNC_RDN0>,
+				<MT8167_PIN_85_RDP0__FUNC_RDP0>,
+				<MT8167_PIN_86_RDN1__FUNC_RDN1>,
+				<MT8167_PIN_87_RDP1__FUNC_RDP1>,
+				<MT8167_PIN_88_RCN__FUNC_RCN>,
+				<MT8167_PIN_89_RCP__FUNC_RCP>,
+				<MT8167_PIN_90_RDN2__FUNC_RDN2>,
+				<MT8167_PIN_91_RDP2__FUNC_RDP2>,
+				<MT8167_PIN_92_RDN3__FUNC_RDN3>,
+				<MT8167_PIN_93_RDP3__FUNC_RDP3>,
+				<MT8167_PIN_94_RCN_A__FUNC_RCN_A>,
+				<MT8167_PIN_95_RCP_A__FUNC_RCP_A>,
+				<MT8167_PIN_96_RDN1_A__FUNC_RDN1_A>,
+				<MT8167_PIN_97_RDP1_A__FUNC_RDP1_A>,
+				<MT8167_PIN_98_RDN0_A__FUNC_RDN0_A>,
+				<MT8167_PIN_99_RDP0_A__FUNC_RDP0_A>,
+				<MT8167_PIN_102_CMMCLK__FUNC_CMMCLK>;
+		};
+	};
+
+	camera_pins_ov: cam_pin_ov {
+		pins_cmd_power_ctl {
+			pinmux = <MT8167_PIN_14_EINT14__FUNC_GPIO14>;
+			output-high;
+			bias-pull-down;
+		};
+
+		pins_cmd_power_rst {
+			pinmux = <MT8167_PIN_15_EINT15__FUNC_GPIO15>;
+			output-low;
+		};
+	};
 };
 
 &i2c0 {
@@ -513,6 +554,38 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&i2c0_pins_a>;
 	clock-div = <2>;
+
+	ov5645: ov5645@3c {
+		compatible = "ovti,ov5645_mipi";
+		status = "okay";
+		reg = <0x3c>;
+		power-domains = <&scpsys MT8167_POWER_DOMAIN_ISP>;
+
+		pwn-gpios = <&pio 14 GPIO_ACTIVE_HIGH>;
+		rst-gpios = <&pio 15 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&camera_pins_ov>;
+
+		DOVDD-supply = <&mt6392_vcamio_reg>;
+		DVDD-supply = <&mt6392_vcamd_reg>;
+		AVDD-supply = <&mt6392_vcama_reg>;
+
+		clocks = <&cam_dummy_clk>;
+		clock-names = "csi_mclk";
+
+		mclk = <24000000>;
+		mclk_source = <0>;
+		ae_target = <52>;
+		csi_id = <0>;
+
+		port {
+			ov5645_endpoint: endpoint {
+				remote-endpoint = <&mipicsi0_endpoint>;
+				clock-lanes = <0>;
+				data-lanes = <1 2>;
+			};
+		};
+	};
 };
 
 &i2c1 {
@@ -531,6 +604,16 @@
 	scl-gpios = <&pio 61 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
 };
 
+&mipicsi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&camera_pins_default>;
+	port {
+		mipicsi0_endpoint: endpoint {
+			remote-endpoint = <&ov5645_endpoint>;
+		};
+	};
+};
+
 &spi {
 	status = "okay";
 	spidev@0 {