| [ |
| { |
| "PublicDescription": "This event counts the number of memory ordering Machine Clears detected. Memory Ordering Machine Clears can result from memory disambiguation, external snoops, or cross SMT-HW-thread snoop (stores) hitting load buffers. Machine clears can have a significant performance impact if they are happening frequently.", |
| "EventCode": "0xC3", |
| "Counter": "0,1,2,3", |
| "UMask": "0x2", |
| "EventName": "MACHINE_CLEARS.MEMORY_ORDERING", |
| "SampleAfterValue": "100003", |
| "BriefDescription": "Counts the number of machine clears due to memory order conflicts.", |
| "CounterHTOff": "0,1,2,3,4,5,6,7" |
| }, |
| { |
| "PEBS": "2", |
| "EventCode": "0xCD", |
| "MSRValue": "0x4", |
| "Counter": "3", |
| "UMask": "0x1", |
| "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4", |
| "MSRIndex": "0x3F6", |
| "SampleAfterValue": "100003", |
| "BriefDescription": "Loads with latency value being above 4 .", |
| "TakenAlone": "1", |
| "CounterHTOff": "3" |
| }, |
| { |
| "PEBS": "2", |
| "EventCode": "0xCD", |
| "MSRValue": "0x8", |
| "Counter": "3", |
| "UMask": "0x1", |
| "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8", |
| "MSRIndex": "0x3F6", |
| "SampleAfterValue": "50021", |
| "BriefDescription": "Loads with latency value being above 8.", |
| "TakenAlone": "1", |
| "CounterHTOff": "3" |
| }, |
| { |
| "PEBS": "2", |
| "EventCode": "0xCD", |
| "MSRValue": "0x10", |
| "Counter": "3", |
| "UMask": "0x1", |
| "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16", |
| "MSRIndex": "0x3F6", |
| "SampleAfterValue": "20011", |
| "BriefDescription": "Loads with latency value being above 16.", |
| "TakenAlone": "1", |
| "CounterHTOff": "3" |
| }, |
| { |
| "PEBS": "2", |
| "EventCode": "0xCD", |
| "MSRValue": "0x20", |
| "Counter": "3", |
| "UMask": "0x1", |
| "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32", |
| "MSRIndex": "0x3F6", |
| "SampleAfterValue": "100007", |
| "BriefDescription": "Loads with latency value being above 32.", |
| "TakenAlone": "1", |
| "CounterHTOff": "3" |
| }, |
| { |
| "PEBS": "2", |
| "EventCode": "0xCD", |
| "MSRValue": "0x40", |
| "Counter": "3", |
| "UMask": "0x1", |
| "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64", |
| "MSRIndex": "0x3F6", |
| "SampleAfterValue": "2003", |
| "BriefDescription": "Loads with latency value being above 64.", |
| "TakenAlone": "1", |
| "CounterHTOff": "3" |
| }, |
| { |
| "PEBS": "2", |
| "EventCode": "0xCD", |
| "MSRValue": "0x80", |
| "Counter": "3", |
| "UMask": "0x1", |
| "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128", |
| "MSRIndex": "0x3F6", |
| "SampleAfterValue": "1009", |
| "BriefDescription": "Loads with latency value being above 128.", |
| "TakenAlone": "1", |
| "CounterHTOff": "3" |
| }, |
| { |
| "PEBS": "2", |
| "EventCode": "0xCD", |
| "MSRValue": "0x100", |
| "Counter": "3", |
| "UMask": "0x1", |
| "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256", |
| "MSRIndex": "0x3F6", |
| "SampleAfterValue": "503", |
| "BriefDescription": "Loads with latency value being above 256.", |
| "TakenAlone": "1", |
| "CounterHTOff": "3" |
| }, |
| { |
| "PEBS": "2", |
| "EventCode": "0xCD", |
| "MSRValue": "0x200", |
| "Counter": "3", |
| "UMask": "0x1", |
| "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512", |
| "MSRIndex": "0x3F6", |
| "SampleAfterValue": "101", |
| "BriefDescription": "Loads with latency value being above 512.", |
| "TakenAlone": "1", |
| "CounterHTOff": "3" |
| }, |
| { |
| "PEBS": "2", |
| "EventCode": "0xCD", |
| "Counter": "3", |
| "UMask": "0x2", |
| "EventName": "MEM_TRANS_RETIRED.PRECISE_STORE", |
| "SampleAfterValue": "2000003", |
| "BriefDescription": "Sample stores and collect precise store operation via PEBS record. PMC3 only. (Precise Event - PEBS).", |
| "PRECISE_STORE": "1", |
| "TakenAlone": "1", |
| "CounterHTOff": "3" |
| }, |
| { |
| "EventCode": "0xBE", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "EventName": "PAGE_WALKS.LLC_MISS", |
| "SampleAfterValue": "100003", |
| "BriefDescription": "Number of any page walk that had a miss in LLC. Does not necessary cause a SUSPEND.", |
| "CounterHTOff": "0,1,2,3,4,5,6,7" |
| }, |
| { |
| "EventCode": "0x05", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "EventName": "MISALIGN_MEM_REF.LOADS", |
| "SampleAfterValue": "2000003", |
| "BriefDescription": "Speculative cache line split load uops dispatched to L1 cache.", |
| "CounterHTOff": "0,1,2,3,4,5,6,7" |
| }, |
| { |
| "EventCode": "0x05", |
| "Counter": "0,1,2,3", |
| "UMask": "0x2", |
| "EventName": "MISALIGN_MEM_REF.STORES", |
| "SampleAfterValue": "2000003", |
| "BriefDescription": "Speculative cache line split STA uops dispatched to L1 cache.", |
| "CounterHTOff": "0,1,2,3,4,5,6,7" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x300400244", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.ALL_CODE_RD.LLC_MISS.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": "Counts all demand & prefetch code reads that miss the LLC and the data returned from dram.", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x300400091", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.LLC_MISS.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": "Counts all demand & prefetch data reads that miss the LLC and the data returned from dram.", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x300400240", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.ALL_PF_CODE_RD.LLC_MISS.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": "Counts all prefetch code reads that miss the LLC and the data returned from dram.", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x300400090", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.LLC_MISS.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": "Counts all prefetch data reads that miss the LLC and the data returned from dram.", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x300400120", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.LLC_MISS.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": "Counts all prefetch RFOs that miss the LLC and the data returned from dram.", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x3004003f7", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": "Counts all data/code/rfo reads (demand & prefetch) that miss the LLC and the data returned from dram.", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x300400122", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.ALL_RFO.LLC_MISS.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": "Counts all demand & prefetch RFOs that miss the LLC and the data returned from dram.", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x300400004", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": "Counts demand code reads that miss the LLC and the data returned from dram.", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x300400001", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": "Counts demand data reads that miss the LLC and the data returned from dram.", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x300400002", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.LLC_MISS.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": "Counts demand data writes (RFOs) that miss the LLC and the data returned from dram.", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x300400040", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.LLC_MISS.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": "Counts all prefetch (that bring data to L2) code reads that miss the LLC and the data returned from dram.", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x300400010", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC and the data returned from dram.", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x300400020", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.LLC_MISS.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs that miss the LLC and the data returned from dram.", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x300400200", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.PF_LLC_CODE_RD.LLC_MISS.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": "Counts all prefetch (that bring data to LLC only) code reads that miss the LLC and the data returned from dram.", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x300400080", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.PF_LLC_DATA_RD.LLC_MISS.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads that miss the LLC and the data returned from dram.", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x300400100", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.PF_LLC_RFO.LLC_MISS.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs that miss the LLC and the data returned from dram.", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "PublicDescription": "This event counts all data requests (demand/prefetch data reads and demand data writes (RFOs) that miss the LLC where the data is returned from local DRAM", |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x6004001b3", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.DATA_IN_SOCKET.LLC_MISS.LOCAL_DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": "Counts LLC replacements.", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "PublicDescription": "This event counts any requests that miss the LLC where the data was returned from local DRAM", |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x1f80408fff", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.LLC_MISS_LOCAL.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": " REQUEST = ANY_REQUEST and RESPONSE = LLC_MISS_LOCAL and SNOOP = DRAM", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x17004001b3", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.DATA_IN_SOCKET.LLC_MISS_LOCAL.ANY_LLC_HIT", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": " REQUEST = DATA_IN_SOCKET and RESPONSE = LLC_MISS_LOCAL and SNOOP = ANY_LLC_HIT", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x1f80400004", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.DEMAND_IFETCH.LLC_MISS_LOCAL.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": " REQUEST = DEMAND_IFETCH and RESPONSE = LLC_MISS_LOCAL and SNOOP = DRAM", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x1f80400010", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.PF_DATA_RD.LLC_MISS_LOCAL.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": " REQUEST = PF_DATA_RD and RESPONSE = LLC_MISS_LOCAL and SNOOP = DRAM", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x1f80400040", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.PF_IFETCH.LLC_MISS_LOCAL.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": " REQUEST = PF_RFO and RESPONSE = LLC_MISS_LOCAL and SNOOP = DRAM", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x1f80400080", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.PF_L_DATA_RD.LLC_MISS_LOCAL.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": " REQUEST = PF_LLC_DATA_RD and RESPONSE = LLC_MISS_LOCAL and SNOOP = DRAM", |
| "CounterHTOff": "0,1,2,3" |
| }, |
| { |
| "EventCode": "0xB7, 0xBB", |
| "MSRValue": "0x1f80400200", |
| "Counter": "0,1,2,3", |
| "UMask": "0x1", |
| "Offcore": "1", |
| "EventName": "OFFCORE_RESPONSE.PF_L_IFETCH.LLC_MISS_LOCAL.DRAM", |
| "MSRIndex": "0x1a6,0x1a7", |
| "SampleAfterValue": "100003", |
| "BriefDescription": " REQUEST = PF_LLC_IFETCH and RESPONSE = LLC_MISS_LOCAL and SNOOP = DRAM", |
| "CounterHTOff": "0,1,2,3" |
| } |
| ] |
