| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| /* |
| * Google Veyron Jaq Rev 1+ board device tree source |
| * |
| * Copyright 2015 Google, Inc |
| */ |
| |
| /dts-v1/; |
| |
| #include "rk3288-veyron-chromebook.dtsi" |
| #include "cros-ec-sbs.dtsi" |
| |
| / { |
| model = "Google Jaq"; |
| compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4", |
| "google,veyron-jaq-rev3", "google,veyron-jaq-rev2", |
| "google,veyron-jaq-rev1", "google,veyron-jaq", |
| "google,veyron", "rockchip,rk3288"; |
| |
| panel_regulator: panel-regulator { |
| compatible = "regulator-fixed"; |
| enable-active-high; |
| gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&lcd_enable_h>; |
| regulator-name = "panel_regulator"; |
| startup-delay-us = <100000>; |
| vin-supply = <&vcc33_sys>; |
| }; |
| |
| vcc18_lcd: vcc18-lcd { |
| compatible = "regulator-fixed"; |
| enable-active-high; |
| gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&avdd_1v8_disp_en>; |
| regulator-name = "vcc18_lcd"; |
| regulator-always-on; |
| regulator-boot-on; |
| vin-supply = <&vcc18_wl>; |
| }; |
| |
| backlight_regulator: backlight-regulator { |
| compatible = "regulator-fixed"; |
| enable-active-high; |
| gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&bl_pwr_en>; |
| regulator-name = "backlight_regulator"; |
| vin-supply = <&vcc33_sys>; |
| startup-delay-us = <15000>; |
| }; |
| }; |
| |
| &backlight { |
| /* Jaq panel PWM must be >= 3%, so start non-zero brightness at 8 */ |
| brightness-levels = < |
| 0 |
| 8 9 10 11 12 13 14 15 |
| 16 17 18 19 20 21 22 23 |
| 24 25 26 27 28 29 30 31 |
| 32 33 34 35 36 37 38 39 |
| 40 41 42 43 44 45 46 47 |
| 48 49 50 51 52 53 54 55 |
| 56 57 58 59 60 61 62 63 |
| 64 65 66 67 68 69 70 71 |
| 72 73 74 75 76 77 78 79 |
| 80 81 82 83 84 85 86 87 |
| 88 89 90 91 92 93 94 95 |
| 96 97 98 99 100 101 102 103 |
| 104 105 106 107 108 109 110 111 |
| 112 113 114 115 116 117 118 119 |
| 120 121 122 123 124 125 126 127 |
| 128 129 130 131 132 133 134 135 |
| 136 137 138 139 140 141 142 143 |
| 144 145 146 147 148 149 150 151 |
| 152 153 154 155 156 157 158 159 |
| 160 161 162 163 164 165 166 167 |
| 168 169 170 171 172 173 174 175 |
| 176 177 178 179 180 181 182 183 |
| 184 185 186 187 188 189 190 191 |
| 192 193 194 195 196 197 198 199 |
| 200 201 202 203 204 205 206 207 |
| 208 209 210 211 212 213 214 215 |
| 216 217 218 219 220 221 222 223 |
| 224 225 226 227 228 229 230 231 |
| 232 233 234 235 236 237 238 239 |
| 240 241 242 243 244 245 246 247 |
| 248 249 250 251 252 253 254 255>; |
| power-supply = <&backlight_regulator>; |
| }; |
| |
| &panel { |
| power-supply = <&panel_regulator>; |
| }; |
| |
| &rk808 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>; |
| dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>, |
| <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>; |
| |
| regulators { |
| mic_vcc: LDO_REG2 { |
| regulator-name = "mic_vcc"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| }; |
| }; |
| |
| &sdmmc { |
| disable-wp; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio |
| &sdmmc_bus4>; |
| }; |
| |
| &vcc_5v { |
| enable-active-high; |
| gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&drv_5v>; |
| }; |
| |
| &vcc50_hdmi { |
| enable-active-high; |
| gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&vcc50_hdmi_en>; |
| }; |
| |
| &pinctrl { |
| backlight { |
| bl_pwr_en: bl_pwr_en { |
| rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>; |
| }; |
| }; |
| |
| buck-5v { |
| drv_5v: drv-5v { |
| rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>; |
| }; |
| }; |
| |
| hdmi { |
| vcc50_hdmi_en: vcc50-hdmi-en { |
| rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>; |
| }; |
| }; |
| |
| lcd { |
| lcd_enable_h: lcd-en { |
| rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>; |
| }; |
| |
| avdd_1v8_disp_en: avdd-1v8-disp-en { |
| rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>; |
| }; |
| }; |
| |
| pmic { |
| dvs_1: dvs-1 { |
| rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>; |
| }; |
| |
| dvs_2: dvs-2 { |
| rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>; |
| }; |
| }; |
| }; |
