CHROMIUM: MALI: rockchip: Adapt to r20p0
A few variable names have changed.
BUG=b:149806107
TEST=build veyron_minnie
Change-Id: Ie57fdaf165e15d8db0424c6870cf777d97b29625
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
diff --git a/drivers/gpu/arm/midgard/platform/rk/mali_kbase_config_rk.c b/drivers/gpu/arm/midgard/platform/rk/mali_kbase_config_rk.c
index bb46018..229ec67 100644
--- a/drivers/gpu/arm/midgard/platform/rk/mali_kbase_config_rk.c
+++ b/drivers/gpu/arm/midgard/platform/rk/mali_kbase_config_rk.c
@@ -77,8 +77,8 @@
dev_dbg(kbdev->dev, "Enabling regulator.");
- for (i = 0; i < kbdev->regulator_num; i++) {
- error = regulator_enable(kbdev->regulator[i]);
+ for (i = 0; i < kbdev->nr_regulators; i++) {
+ error = regulator_enable(kbdev->regulators[i]);
if (error < 0) {
dev_err(kbdev->dev,
"Power on reg %d failed error = %d\n",
@@ -95,8 +95,8 @@
int error;
int i;
- for (i = 0; i < kbdev->regulator_num; i++) {
- error = regulator_disable(kbdev->regulator[i]);
+ for (i = 0; i < kbdev->nr_regulators; i++) {
+ error = regulator_disable(kbdev->regulators[i]);
if (error < 0) {
dev_err(kbdev->dev,
"Power off reg %d failed error = %d\n",
@@ -109,11 +109,11 @@
{
int ret = 0;
- if (!(kbdev->clock)) {
+ if (!(kbdev->clocks[0])) {
dev_dbg(kbdev->dev, "Continuing without Mali clock control\n");
/* Allow probe to continue without clock. */
} else {
- ret = clk_prepare_enable(kbdev->clock);
+ ret = clk_prepare_enable(kbdev->clocks[0]);
if (ret)
dev_err(kbdev->dev, "failed to enable clk: %d\n", ret);
}
@@ -123,11 +123,11 @@
static void rk_pm_disable_clk(struct kbase_device *kbdev)
{
- if (!(kbdev->clock))
+ if (!(kbdev->clocks[0]))
dev_dbg(kbdev->dev, "Continuing without Mali clock control\n");
/* Allow probe to continue without clock. */
else
- clk_disable_unprepare(kbdev->clock);
+ clk_disable_unprepare(kbdev->clocks[0]);
}
static int rk_pm_callback_power_on(struct kbase_device *kbdev)
