| /* |
| * Copyright 2018 NXP |
| * |
| * This program is free software; you can redistribute it and/or |
| * modify it under the terms of the GNU General Public License |
| * as published by the Free Software Foundation; either version 2 |
| * of the License, or (at your option) any later version. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| |
| #include "fsl-imx8mm-evk.dts" |
| |
| / { |
| interrupt-parent = <&gic>; |
| }; |
| |
| /delete-node/ &gpc; |
| |
| &CPU_SLEEP { |
| /* We are not using GPC for now, need set 0 to avoid hang */ |
| /delete-property/ compatible; |
| /*arm,psci-suspend-param = <0x0>;*/ |
| }; |
| |
| &clk { |
| init-on-array = <IMX8MM_CLK_AHB_CG IMX8MM_CLK_DRAM_CORE |
| IMX8MM_CLK_NOC_CG IMX8MM_CLK_NOC_APB_CG |
| IMX8MM_CLK_USB_BUS_CG |
| IMX8MM_CLK_MAIN_AXI_CG IMX8MM_CLK_AUDIO_AHB_CG |
| IMX8MM_CLK_DRAM_APB_DIV IMX8MM_CLK_A53_DIV |
| IMX8MM_ARM_PLL_OUT IMX8MM_CLK_DISP_AXI_CG |
| IMX8MM_CLK_DISP_APB_CG |
| IMX8MM_CLK_NAND_USDHC_BUS_CG |
| IMX8MM_CLK_USDHC3_ROOT |
| IMX8MM_CLK_UART4_ROOT>; |
| }; |
| |
| &iomuxc { |
| imx8mq-evk { |
| /* |
| * Used for the 2nd Linux. |
| * TODO: M4 may use these pins. |
| */ |
| pinctrl_uart4: uart4grp { |
| fsl,pins = < |
| MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140 |
| MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140 |
| >; |
| }; |
| |
| }; |
| }; |
| |
| &{/busfreq} { |
| /* Disable busfreq, to avoid 1st Linux busfreq crash other inmates */ |
| status = "disabled"; |
| }; |
| |
| &{/reserved-memory} { |
| |
| ivshmem_reserved: ivshmem@0xbbb00000 { |
| no-map; |
| reg = <0 0xbbb00000 0x0 0x00100000>; |
| }; |
| |
| ivshmem2_reserved: ivshmem2@0xbba00000 { |
| no-map; |
| reg = <0 0xbba00000 0x0 0x00100000>; |
| }; |
| |
| pci_reserved: pci@0xbb800000 { |
| no-map; |
| reg = <0 0xbb800000 0x0 0x00200000>; |
| }; |
| |
| loader_reserved: loader@0xbb700000 { |
| no-map; |
| reg = <0 0xbb700000 0x0 0x00100000>; |
| }; |
| |
| jh_reserved: jh@0xb7c00000 { |
| no-map; |
| reg = <0 0xb7c00000 0x0 0x00400000>; |
| }; |
| |
| /* 512MB */ |
| inmate_reserved: inmate@0x93c00000 { |
| no-map; |
| reg = <0 0x93c00000 0x0 0x24000000>; |
| }; |
| }; |
| |
| &uart2 { |
| /* uart2 is used by the 2nd OS, so configure pin and clk */ |
| pinctrl-0 = <&pinctrl_uart2>, <&pinctrl_uart4>; |
| assigned-clocks = <&clk IMX8MM_CLK_UART4_SRC>; |
| assigned-clock-parents = <&clk IMX8MM_CLK_24M>; |
| }; |
| |
| &usdhc3 { |
| status = "disabled"; |
| }; |
| |
| &usdhc2 { |
| /* sdhc3 is used by 2nd linux, configure the pin */ |
| pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; |
| pinctrl-1 = <&pinctrl_usdhc3>, <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; |
| pinctrl-2 = <&pinctrl_usdhc3>, <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; |
| }; |