arch/arm64/boot/dts/freescale/fsl-imx8mq-phanbell-adv7535.dtsi

/*
 * Copyright 2019 Google LLC
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

/* Enables the ADV7535 DSI<->HDMI bridge chip on Phanbell.
   Include this at the bottom of fsl-imx8mq-phanbell.dts to enable. */

&hdmi {
    status = "disabled";
};

&dcss {
    disp-dev = "mipi_disp";
    status = "okay";
	clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>,
		 <&clk IMX8MQ_CLK_DISP_AXI_ROOT>,
		 <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>,
		 <&clk IMX8MQ_CLK_DC_PIXEL>,
		 <&clk IMX8MQ_CLK_DISP_DTRC>,
		 <&clk IMX8MQ_VIDEO_PLL1>,
		 <&clk IMX8MQ_CLK_27M>,
		 <&clk IMX8MQ_CLK_25M>;
	clock-names = "apb", "axi", "rtrm", "pix", "dtrc",
		      "pll", "pll_src1", "pll_src2";
	assigned-clocks = <&clk IMX8MQ_CLK_DC_PIXEL>,
			  <&clk IMX8MQ_CLK_DISP_AXI>,
			  <&clk IMX8MQ_CLK_DISP_RTRM>;
	assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>,
				 <&clk IMX8MQ_SYS1_PLL_800M>,
				 <&clk IMX8MQ_SYS1_PLL_800M>;
	assigned-clock-rates = <594000000>,
			       <800000000>,
			       <400000000>;
};

&i2c2 {
	status = "okay";

	ov5645_mipi@3c {
		status = "disabled";
	};

	adv_bridge: adv7535@3d {
		compatible = "adi,adv7535";
		reg = <0x3d>;
		adi,dsi-lanes = <4>;

		ports {
			port@0 {
				adv7535_in: endpoint {
					remote-endpoint = <&mipi_dsi_bridge_out>;
				};
			};
		};
	};
};

&mipi_dsi {
	status = "okay";
};

&mipi_dsi_phy {
	status = "okay";
};

&mipi_dsi_bridge {
	status = "okay";
	panel@0 {
		status = "disabled";
	};
	port@1 {
		mipi_dsi_bridge_out: endpoint {
			remote-endpoint = <&adv7535_in>;
		};
	};
};