| * Cadence USB3 Controller |
| |
| Required properties: |
| - compatible: "Cadence,usb3"; |
| - reg: base address and length of the registers |
| - interrupts: interrupt for the USB controller |
| - interrupt-parent: the interrupt parent for this module |
| - clocks: reference to the USB clock |
| - clock-names: the name of clocks |
| - cdns3,usbphy: reference to the USB PHY |
| |
| Optional properties: |
| - dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg" |
| - extcon: extcon phandler for cdns3 device |
| - power-domains: the power domain for cdns3 controller and phy |
| |
| Examples: |
| |
| usbotg3: cdns3@5b110000 { |
| compatible = "Cadence,usb3"; |
| reg = <0x0 0x5B110000 0x0 0x10000>, |
| <0x0 0x5B130000 0x0 0x10000>, |
| <0x0 0x5B140000 0x0 0x10000>, |
| <0x0 0x5B160000 0x0 0x40000>; |
| interrupt-parent = <&gic>; |
| interrupts = <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&clk IMX8QM_USB3_LPM_CLK>, |
| <&clk IMX8QM_USB3_BUS_CLK>, |
| <&clk IMX8QM_USB3_ACLK>, |
| <&clk IMX8QM_USB3_IPG_CLK>, |
| <&clk IMX8QM_USB3_CORE_PCLK>; |
| clock-names = "usb3_lpm_clk", "usb3_bus_clk", "usb3_aclk", |
| "usb3_ipg_clk", "usb3_core_pclk"; |
| power-domains = <&pd_conn_usb2>; |
| cdns3,usbphy = <&usbphynop1>; |
| dr_mode = "otg"; |
| extcon = <&typec_ptn5150>; |
| status = "disabled"; |
| }; |