| Device tree bindings for Texas instruments Davinci/Keystone NAND controller |
| |
| This file provides information, what the device node for the davinci/keystone |
| NAND interface contains. |
| |
| Documentation: |
| Davinci DM646x - http://www.ti.com/lit/ug/sprueq7c/sprueq7c.pdf |
| Kestone - http://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf |
| |
| Required properties: |
| |
| - compatible: "ti,davinci-nand" |
| "ti,keystone-nand" |
| |
| - reg: Contains 2 offset/length values: |
| - offset and length for the access window. |
| - offset and length for accessing the AEMIF |
| control registers. |
| |
| - ti,davinci-chipselect: number of chipselect. Indicates on the |
| davinci_nand driver which chipselect is used |
| for accessing the nand. |
| Can be in the range [0-3]. |
| |
| Recommended properties : |
| |
| - ti,davinci-mask-ale: mask for ALE. Needed for executing address |
| phase. These offset will be added to the base |
| address for the chip select space the NAND Flash |
| device is connected to. |
| If not set equal to 0x08. |
| |
| - ti,davinci-mask-cle: mask for CLE. Needed for executing command |
| phase. These offset will be added to the base |
| address for the chip select space the NAND Flash |
| device is connected to. |
| If not set equal to 0x10. |
| |
| - ti,davinci-mask-chipsel: mask for chipselect address. Needed to mask |
| addresses for given chipselect. |
| |
| - nand-ecc-mode: operation mode of the NAND ecc mode. ECC mode |
| valid values for davinci driver: |
| - "none" |
| - "soft" |
| - "hw" |
| |
| - ti,davinci-ecc-bits: used ECC bits, currently supported 1 or 4. |
| |
| - nand-bus-width: buswidth 8 or 16. If not present 8. |
| |
| - nand-on-flash-bbt: use flash based bad block table support. OOB |
| identifier is saved in OOB area. If not present |
| false. |
| |
| Deprecated properties: |
| |
| - ti,davinci-ecc-mode: operation mode of the NAND ecc mode. ECC mode |
| valid values for davinci driver: |
| - "none" |
| - "soft" |
| - "hw" |
| |
| - ti,davinci-nand-buswidth: buswidth 8 or 16. If not present 8. |
| |
| - ti,davinci-nand-use-bbt: use flash based bad block table support. OOB |
| identifier is saved in OOB area. If not present |
| false. |
| |
| Nand device bindings may contain additional sub-nodes describing partitions of |
| the address space. See partition.txt for more detail. The NAND Flash timing |
| values must be programmed in the chip select’s node of AEMIF |
| memory-controller (see Documentation/devicetree/bindings/memory-controllers/ |
| davinci-aemif.txt). |
| |
| Example(da850 EVM ): |
| |
| nand_cs3@62000000 { |
| compatible = "ti,davinci-nand"; |
| reg = <0x62000000 0x807ff |
| 0x68000000 0x8000>; |
| ti,davinci-chipselect = <1>; |
| ti,davinci-mask-ale = <0>; |
| ti,davinci-mask-cle = <0>; |
| ti,davinci-mask-chipsel = <0>; |
| nand-ecc-mode = "hw"; |
| ti,davinci-ecc-bits = <4>; |
| nand-on-flash-bbt; |
| |
| partition@180000 { |
| label = "ubifs"; |
| reg = <0x180000 0x7e80000>; |
| }; |
| }; |