| Device Tree Clock bindings for Marvell Berlin |
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| This binding uses the common clock binding[1]. |
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| [1] Documentation/devicetree/bindings/clock/clock-bindings.txt |
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| Clock related registers are spread among the chip control registers. Berlin |
| clock node should be a sub-node of the chip controller node. Marvell Berlin2 |
| (BG2, BG2CD, BG2Q) SoCs share the same IP for PLLs and clocks, with some |
| minor differences in features and register layout. |
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| Required properties: |
| - compatible: must be "marvell,berlin2-clk" or "marvell,berlin2q-clk" |
| - #clock-cells: must be 1 |
| - clocks: must be the input parent clock phandle |
| - clock-names: name of the input parent clock |
| Allowed clock-names for the reference clocks are |
| "refclk" for the SoCs oscillator input on all SoCs, |
| and SoC-specific input clocks for |
| BG2/BG2CD: "video_ext0" for the external video clock input |
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| Example: |
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| chip_clk: clock { |
| compatible = "marvell,berlin2q-clk"; |
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| #clock-cells = <1>; |
| clocks = <&refclk>; |
| clock-names = "refclk"; |
| }; |