blob: 19ba5c627ba2ab3e031aece15809ee665489ae50 [file] [log] [blame]
/*
* Copyright 2019 NXP
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "fsl-imx8qxp-mek.dtsi"
/delete-node/ &i2c0_cm40;
/delete-node/ &i2c1;
&i2c_rpbus_1 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
typec_ptn5110: typec@50 {
compatible = "usb,tcpci";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_typec>;
reg = <0x50>;
interrupt-parent = <&gpio1>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
ss-sel-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
reset-gpios = <&pca9557_a 7 GPIO_ACTIVE_HIGH>;
src-pdos = <0x380190c8 0x3803c0c8>;
port-type = "drp";
sink-disable;
default-role = "source";
status = "okay";
};
};
&i2c_rpbus_5 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
wm8960: wm8960@1a {
compatible = "wlf,wm8960";
reg = <0x1a>;
clocks = <&clk IMX8QXP_AUD_MCLKOUT0>;
clock-names = "mclk";
wlf,shared-lrclk;
power-domains = <&pd_mclk_out0>;
assigned-clocks = <&clk IMX8QXP_AUD_PLL0_DIV>,
<&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_DIV>,
<&clk IMX8QXP_AUD_ACM_AUD_REC_CLK0_DIV>,
<&clk IMX8QXP_AUD_MCLKOUT0>;
assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>;
};
pca6416: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
};
cs42888: cs42888@48 {
compatible = "cirrus,cs42888";
reg = <0x48>;
clocks = <&clk IMX8QXP_AUD_MCLKOUT0>;
clock-names = "mclk";
VA-supply = <&reg_audio>;
VD-supply = <&reg_audio>;
VLS-supply = <&reg_audio>;
VLC-supply = <&reg_audio>;
reset-gpio = <&pca9557_b 1 1>;
power-domains = <&pd_mclk_out0>;
assigned-clocks = <&clk IMX8QXP_AUD_PLL0_DIV>,
<&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_DIV>,
<&clk IMX8QXP_AUD_ACM_AUD_REC_CLK0_DIV>,
<&clk IMX8QXP_AUD_MCLKOUT0>;
assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>;
fsl,txs-rxm;
status = "okay";
};
ov5640: ov5640@3c {
compatible = "ovti,ov5640_v3";
reg = <0x3c>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_parallel_csi>;
clocks = <&clk IMX8QXP_PARALLEL_CSI_MISC0_CLK>;
clock-names = "csi_mclk";
pwn-gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
rst-gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;
csi_id = <0>;
mclk = <24000000>;
mclk_source = <0>;
status = "okay";
port {
ov5640_ep: endpoint {
remote-endpoint = <&parallel_csi_ep>;
};
};
};
};
&i2c_rpbus_12 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
max7322: gpio@68 {
compatible = "maxim,max7322";
reg = <0x68>;
gpio-controller;
#gpio-cells = <2>;
};
};
&i2c_rpbus_14 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
fxos8700@1e {
compatible = "fsl,fxos8700";
reg = <0x1e>;
interrupt-open-drain;
};
fxas2100x@21 {
compatible = "fsl,fxas2100x";
reg = <0x21>;
interrupt-open-drain;
};
mpl3115@60 {
compatible = "fsl,mpl3115";
reg = <0x60>;
interrupt-open-drain;
};
};
&i2c_rpbus_15 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pca9557_a: gpio@1a {
compatible = "nxp,pca9557";
reg = <0x1a>;
gpio-controller;
#gpio-cells = <2>;
};
pca9557_b: gpio@1d {
compatible = "nxp,pca9557";
reg = <0x1d>;
gpio-controller;
#gpio-cells = <2>;
};
isl29023@44 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_isl29023>;
compatible = "fsl,isl29023";
reg = <0x44>;
rext = <499>;
interrupt-parent = <&gpio1>;
interrupts = <2 2>;
};
};
&rpmsg{
/*
* 64K for one rpmsg instance:
*/
vdev-nums = <2>;
reg = <0x0 0x90000000 0x0 0x20000>;
status = "okay";
};
&reg_can_en {
status = "disabled";
};
&reg_can_stby {
status = "disabled";
};
&intmux_cm40 {
status = "disabled";
};
&flexcan1 {
status = "disabled";
};
&flexcan2 {
status = "disabled";
};
&flexspi0 {
status = "disabled";
};
&lpuart3 {
status = "disabled";
};