blob: 788680861daeeed3f7f1f7c11143972b75c0e779 [file] [log] [blame]
/*
* Copyright 2018 NXP
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/*
* HDMI IN only dts.
*/
#include "fsl-imx8qm-mek-hdmi.dts"
/ {
sound-hdmi-rx {
compatible = "fsl,imx-audio-cdnhdmi";
model = "imx-audio-hdmi-rx";
audio-cpu = <&sai_hdmi_rx>;
protocol = <1>;
hdmi-in;
};
};
/* HDMI RX */
&isi_2 {
interface = <4 0 2>; /* <Input MIPI_VCx Output>
Input: 0-DC0, 1-DC1, 2-MIPI CSI0, 3-MIPI CSI1, 4-HDMI, 5-MEM
VCx: 0-VC0, 1-VC1, 2-VC2, 3-VC3, MIPI CSI only
Output: 0-DC0, 1-DC1, 2-MEM */
status = "okay";
};
&isi_3 {
/* For HDMI RX 4K chain buf */
interface = <4 0 2>;
status = "okay";
};
&mipi_csi_0 {
status = "disabled";
};
&i2c0_mipi_csi0 {
status = "disabled";
};
&hdmi_rx {
fsl,cec;
assigned-clocks = <&clk IMX8QM_HDMI_RX_HD_REF_SEL>,
<&clk IMX8QM_HDMI_RX_PXL_SEL>,
<&clk IMX8QM_HDMI_RX_HD_REF_DIV>;
assigned-clock-parents = <&clk IMX8QM_HDMI_RX_DIG_PLL_CLK>,
<&clk IMX8QM_HDMI_RX_BYPASS_CLK>;
assigned-clock-rates = <0>, <0>, <400000000>;
status = "okay";
};
&sai_hdmi_rx {
fsl,sai-asynchronous;
status = "okay";
};