| /* SPDX-License-Identifier: GPL-2.0 */ |
| #ifndef _ASM_X86_TEXT_PATCHING_H |
| #define _ASM_X86_TEXT_PATCHING_H |
| |
| #include <linux/types.h> |
| #include <linux/stddef.h> |
| #include <asm/ptrace.h> |
| |
| struct paravirt_patch_site; |
| #ifdef CONFIG_PARAVIRT |
| void apply_paravirt(struct paravirt_patch_site *start, |
| struct paravirt_patch_site *end); |
| #else |
| static inline void apply_paravirt(struct paravirt_patch_site *start, |
| struct paravirt_patch_site *end) |
| {} |
| #define __parainstructions NULL |
| #define __parainstructions_end NULL |
| #endif |
| |
| extern void *text_poke_early(void *addr, const void *opcode, size_t len); |
| |
| /* |
| * Clear and restore the kernel write-protection flag on the local CPU. |
| * Allows the kernel to edit read-only pages. |
| * Side-effect: any interrupt handler running between save and restore will have |
| * the ability to write to read-only pages. |
| * |
| * Warning: |
| * Code patching in the UP case is safe if NMIs and MCE handlers are stopped and |
| * no thread can be preempted in the instructions being modified (no iret to an |
| * invalid instruction possible) or if the instructions are changed from a |
| * consistent state to another consistent state atomically. |
| * On the local CPU you need to be protected again NMI or MCE handlers seeing an |
| * inconsistent instruction while you patch. |
| */ |
| extern void *text_poke(void *addr, const void *opcode, size_t len); |
| extern int poke_int3_handler(struct pt_regs *regs); |
| extern void *text_poke_bp(void *addr, const void *opcode, size_t len, void *handler); |
| |
| #endif /* _ASM_X86_TEXT_PATCHING_H */ |