| commit | d6f509e8b2e20279f6420b395636dffe110765c0 | [log] [tgz] |
|---|---|---|
| author | Jacky Bai <ping.bai@nxp.com> | Fri Jan 18 15:21:11 2019 +0800 |
| committer | Jacky Bai <ping.bai@nxp.com> | Fri Jan 25 18:51:17 2019 +0800 |
| tree | 495bc7a5a4f1e4869e7b096c500f73ea13106ed2 | |
| parent | 5b2e43658b4acaa74ab16419a4b3d436a08c222c [diff] |
plat: imx8mm: update the stby_count setting The reset value of the STBY_COUNT is 0x0, so it means GPC will wait for 4 ckil(32K) clock cycle before checking the PMIC ready signal. increase this value to 0x5, 128 ckil to make sure PMIC output voltage is stable before GPC continue to finish the DSM exit flow. Signed-off-by: Jacky Bai <ping.bai@nxp.com> (cherry picked from commit 94f65be918f91df676f0e61c4fef97dfd31e168f)