commit d39a0ceaa1eddfdbe0b97942cc29b52e419d0fd4
author Anson Huang <Anson.Huang@nxp.com> Mon Sep 03 14:15:27 2018 +0800
committer Jacky Bai <ping.bai@nxp.com> Fri Jan 25 18:51:17 2019 +0800
tree 146d592a023381ca959c5043df9c09b49560ae68
parent 16ff6645a7bfa280424a13367609371a04c99d50

imx8mq: update chip revision method for B1

i.MX8MQ B1's chip revision is identified by reading
OCOTP offset 0x40, the magic number 0xff0055aa is
for B1.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit 701e7961dfe568d724343c4e2897907cb34cc276)

plat/imx/imx8mq/include/platform_def.h

diff --git a/plat/imx/imx8mq/include/platform_def.h b/plat/imx/imx8mq/include/platform_def.h
index 8cbae37..5aef41b 100644
--- a/plat/imx/imx8mq/include/platform_def.h
+++ b/plat/imx/imx8mq/include/platform_def.h
@@ -54,6 +54,7 @@
 #define IMX_AIPS1_BASE			0x30200000
 #define IMX_AIPS3_ARB_BASE		0x30800000
 #define IMX_ANAMIX_BASE			0x30360000
+#define IMX_OCOTP_BASE			0x30350000
 #define IMX_CCM_BASE			0x30380000
 #define IMX_SRC_BASE			0x30390000
 #define IMX_GPC_BASE			0x303a0000

plat/imx/imx8mq/src.c

diff --git a/plat/imx/imx8mq/src.c b/plat/imx/imx8mq/src.c
index 0d215de..9c6b1ca 100644
--- a/plat/imx/imx8mq/src.c
+++ b/plat/imx/imx8mq/src.c
@@ -24,6 +24,7 @@
 #define DIGPROG		0x6c
 #define SW_INFO_A0	0x800
 #define SW_INFO_B0	0x83C
+#define SW_INFO_B1	0x40
 
 int imx_src_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2,
 		    u_register_t x3)
@@ -58,9 +59,13 @@
 	rom_version = mmio_read_32(IMX_ROM_BASE + SW_INFO_A0);
 	if (rom_version != 0x10) {
 		rom_version = mmio_read_32(IMX_ROM_BASE + SW_INFO_B0);
-		if (rom_version >= 0x20) {
+		if (rom_version == 0x20) {
 			val &= ~0xff;
 			val |= rom_version;
+		} else if (mmio_read_32(IMX_OCOTP_BASE + SW_INFO_B1)
+			   == 0xff0055aa) {
+			/* 0xff0055aa is magic number for B1 */
+			val = 0x21;
 		}
 	}