MLK-20986 imx8: Not protect OCRAM for rev A
On iMX8 Rev A the OCRAM is used to pass over ROM info, and u-boot
needs to access it. So we can't assign the OCRAM to ATF partition.
This will cause boot hang.
Rev A does not support SPL, so it is ok to not protect the OCRAM.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit c9a168bfd16e06b4d6b9f94185910023e4923cf2)
diff --git a/plat/imx/common/include/plat_imx8.h b/plat/imx/common/include/plat_imx8.h
index 4b26356..d7faf27 100644
--- a/plat/imx/common/include/plat_imx8.h
+++ b/plat/imx/common/include/plat_imx8.h
@@ -32,4 +32,5 @@
void imx_get_sys_suspend_power_state(psci_power_state_t *req_state);
bool imx_is_wakeup_src_irqsteer(void);
void __dead2 imx_pwr_domain_pwr_down_wfi(const psci_power_state_t *target_state);
+int imx_get_cpu_rev(uint32_t *cpu_id, uint32_t *cpu_rev);
#endif /*__PLAT_IMX8_H__ */
diff --git a/plat/imx/common/misc.c b/plat/imx/common/misc.c
index df22b56..d1aa8ef 100644
--- a/plat/imx/common/misc.c
+++ b/plat/imx/common/misc.c
@@ -84,6 +84,24 @@
{
return sc_misc_set_temp(ipc_handle, x1, x2, x3, x4);
}
+
+int imx_get_cpu_rev(uint32_t *cpu_id, uint32_t *cpu_rev)
+{
+ uint32_t id;
+ sc_err_t err;
+
+ if (!cpu_id || !cpu_rev)
+ return -1;
+
+ err = sc_misc_get_control(ipc_handle, SC_R_SYSTEM, SC_C_ID, &id);
+ if (err != SC_ERR_NONE)
+ return err;
+
+ *cpu_rev = (id >> 5) & 0xf;
+ *cpu_id = id & 0x1f;
+
+ return 0;
+}
#endif
static uint64_t imx_get_commit_hash(u_register_t x2,
diff --git a/plat/imx/imx8qm/imx8qm_bl31_setup.c b/plat/imx/imx8qm/imx8qm_bl31_setup.c
index 0b1ba3d..11af036 100644
--- a/plat/imx/imx8qm/imx8qm_bl31_setup.c
+++ b/plat/imx/imx8qm/imx8qm_bl31_setup.c
@@ -170,6 +170,10 @@
bool mr_tee_atf_same = false;
sc_faddr_t reg_start;
#endif
+ uint32_t cpu_id, cpu_rev = 0x1; /* Set Rev B as default */
+
+ if (imx_get_cpu_rev(&cpu_id, &cpu_rev) != 0)
+ ERROR("Get CPU id and rev failed\n");
err = sc_rm_get_partition(ipc_handle, &secure_part);
@@ -210,7 +214,7 @@
mr_tee = mr;
}
#endif
- else if (0 >= start && (OCRAM_BASE + OCRAM_ALIAS_SIZE - 1) <= end) {
+ else if (cpu_rev >= 1 && 0 >= start && (OCRAM_BASE + OCRAM_ALIAS_SIZE - 1) <= end) {
mr_ocram = mr;
}
else {
diff --git a/plat/imx/imx8qx/imx8qx_bl31_setup.c b/plat/imx/imx8qx/imx8qx_bl31_setup.c
index 11d33c1..ef81738 100644
--- a/plat/imx/imx8qx/imx8qx_bl31_setup.c
+++ b/plat/imx/imx8qx/imx8qx_bl31_setup.c
@@ -165,6 +165,10 @@
bool mr_tee_atf_same = false;
sc_faddr_t reg_start;
#endif
+ uint32_t cpu_id, cpu_rev = 0x1; /* Set Rev B as default */
+
+ if (imx_get_cpu_rev(&cpu_id, &cpu_rev) != 0)
+ ERROR("Get CPU id and rev failed\n");
err = sc_rm_get_partition(ipc_handle, &secure_part);
if (err)
@@ -210,7 +214,7 @@
mr_tee = mr;
}
#endif
- else if (0 >= start && (OCRAM_BASE + OCRAM_ALIAS_SIZE - 1) <= end) {
+ else if (cpu_rev >= 1 && 0 >= start && (OCRAM_BASE + OCRAM_ALIAS_SIZE - 1) <= end) {
mr_ocram = mr;
}
else {
